|
| From: | Richard Henderson |
| Subject: | Re: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns |
| Date: | Fri, 22 Oct 2021 21:37:36 -0700 |
| User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 |
On 10/21/21 12:45 PM, matheus.ferst@eldorado.org.br wrote:
+#if defined(HOST_WORDS_BIGENDIAN) +#define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->VsrB(IDX)) +#else +#define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->VsrB(IDX) - (SIZE) + 1) +#endif
This is a bit confusing. There's host adjustment in VsrB *and* here.
+#define VINSX(SUFFIX, TYPE) \
+void glue(glue(helper_VINS, SUFFIX), LX)(CPUPPCState *env, ppc_avr_t *t,
\
+ uint64_t val, target_ulong index)
\
+{
\
+ const int maxidx = ARRAY_SIZE(t->u8) - sizeof(TYPE);
\
+ target_long idx = index;
\
+
\
+ if (idx < 0 || idx > maxidx) {
\
+ char c = idx < 0 ? 'R' : 'L';
\
+ idx = idx < 0 ? sizeof(TYPE) - idx : idx;
\
+ qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for VINS" #SUFFIX "%cX"
\
+ " at 0x" TARGET_FMT_lx ", RA = " TARGET_FMT_ld " >
%d\n",\
+ c, env->nip, idx, maxidx);
\
nip is not up to date.
+ } else {
\
+ *(TYPE *)ELEM_ADDR(t, idx, sizeof(TYPE)) = (TYPE)val;
\
This is a potentially misaligned store. You need st*_he_p.
r~
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