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[PATCH v3 22/25] target/ppc: implemented XXSPLTIDP instruction
From: |
matheus . ferst |
Subject: |
[PATCH v3 22/25] target/ppc: implemented XXSPLTIDP instruction |
Date: |
Thu, 4 Nov 2021 09:37:16 -0300 |
From: "Bruno Larsen (billionai)" <bruno.larsen@eldorado.org.br>
Implemented the instruction XXSPLTIDP using decodetree.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/insn64.decode | 2 ++
target/ppc/translate/vsx-impl.c.inc | 10 ++++++++++
2 files changed, 12 insertions(+)
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index bd71f616cc..20aa2b4615 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -169,6 +169,8 @@ PLXVP 000001 00 0--.-- .................. \
PSTXVP 000001 00 0--.-- .................. \
111110 ..... ..... ................ @8LS_D_TSXP
+XXSPLTIDP 000001 01 0000 -- -- ................ \
+ 100000 ..... 0010 . ................ @8RR_D
XXSPLTIW 000001 01 0000 -- -- ................ \
100000 ..... 0011 . ................ @8RR_D
XXSPLTI32DX 000001 01 0000 -- -- ................ \
diff --git a/target/ppc/translate/vsx-impl.c.inc
b/target/ppc/translate/vsx-impl.c.inc
index 7116141a6a..180d329f1a 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -1476,6 +1476,16 @@ static bool trans_XXSPLTIW(DisasContext *ctx, arg_8RR_D
*a)
return true;
}
+static bool trans_XXSPLTIDP(DisasContext *ctx, arg_8RR_D *a)
+{
+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+ REQUIRE_VSX(ctx);
+
+ tcg_gen_gvec_dup_imm(MO_64, vsr_full_offset(a->xt), 16, 16,
+ helper_todouble(a->si));
+ return true;
+}
+
static bool trans_XXSPLTI32DX(DisasContext *ctx, arg_8RR_D_IX *a)
{
TCGv_i32 imm;
--
2.25.1
- [PATCH v3 12/25] target/ppc: moved stxv and lxv from legacy to decodtree, (continued)
- [PATCH v3 12/25] target/ppc: moved stxv and lxv from legacy to decodtree, matheus . ferst, 2021/11/04
- [PATCH v3 13/25] target/ppc: moved stxvx and lxvx from legacy to decodtree, matheus . ferst, 2021/11/04
- [PATCH v3 15/25] target/ppc: added the instructions LXVPX and STXVPX, matheus . ferst, 2021/11/04
- [PATCH v3 14/25] target/ppc: added the instructions LXVP and STXVP, matheus . ferst, 2021/11/04
- [PATCH v3 16/25] target/ppc: added the instructions PLXV and PSTXV, matheus . ferst, 2021/11/04
- [PATCH v3 17/25] target/ppc: added the instructions PLXVP and PSTXVP, matheus . ferst, 2021/11/04
- [PATCH v3 19/25] target/ppc: moved XXSPLTIB to using decodetree, matheus . ferst, 2021/11/04
- [PATCH v3 18/25] target/ppc: moved XXSPLTW to using decodetree, matheus . ferst, 2021/11/04
- [PATCH v3 20/25] target/ppc: implemented XXSPLTI32DX, matheus . ferst, 2021/11/04
- [PATCH v3 21/25] target/ppc: Implemented XXSPLTIW using decodetree, matheus . ferst, 2021/11/04
- [PATCH v3 22/25] target/ppc: implemented XXSPLTIDP instruction,
matheus . ferst <=
- [PATCH v3 23/25] target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions, matheus . ferst, 2021/11/04
- [PATCH v3 24/25] target/ppc: Implement lxvkq instruction, matheus . ferst, 2021/11/04
- [PATCH v3 25/25] target/ppc: cntlzdm/cnttzdm implementation without brcond, matheus . ferst, 2021/11/04
- Re: [PATCH v3 00/25] PowerISA v3.1 instruction batch, David Gibson, 2021/11/04