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Re: ppc64 XER potentially ignored/not setting

From: Mark Cave-Ayland
Subject: Re: ppc64 XER potentially ignored/not setting
Date: Wed, 17 Nov 2021 17:24:30 +0000
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0

On 16/11/2021 14:42, Cédric Le Goater wrote:

Hello Kyle,

I work with the libre-soc team in the testing area. Recently I
have started on writing an interface that uses qemu as another
means to verify our results from our own simulations against qemu

Excellent ! We need more of these low level tests to exercise the CPU
models in QEMU. Some are already there, but really not much :


It would good to extend them using the QEMU framework

You might be interested by the MicroWatt testsuite :


The basic workflow I have set up is:

1. Take a test (which are usually one or two instructions, along
   with a supplied list of registers)
2. Compile it as a bin (no loader, nothing but the compiled
   instructions), launch qemu along with gdb, set registers, PC,
   etc. via gdb
3. Step the instructions, extract registers with gdb and compare
   them to our own results

This might be a bit difficult to integrate.

If you are using the QEMU PowerNV machine, may be you could include
the little 'print' routine below to dump the results on the console :


And skip the gdb part.

This works fairly well for int registers and from what I can tell
so far the CR.  However, and I must apologize if this is somewhat
beyond the scope of what qemu can do since I'm basically treating
it as a finite state machine for this...on tests that use or would
cause a change in the XER: so, ca, ov are ignored.

Launching as (built from latest master):
qemu-system-ppc64 -machine powernv9 -cpu power9 -nographic -s -S -m size=1024 -kernel test_path.bin

You could probably replace the FW with -bios also and skip the skiboot

Here is another QEMU PPC machine emulating MicroWatt, the Open POWER ISA
softcore (POWER9) and SoC which is easier to run  :


it is not mainline though because the POWER9 emulation needs some care
and the SoC definition is loosely defined.

Instruction of test:
sraw 3, 1, 2      : 7c 23 16 30 (big endian)
r1 = 0x82345678
r2 = 8

Upon execution r3 is set correctly to 0xffffffffff823456, however
ca is not set within the XER when it should be.

Could you reproduce the issue with a stand alone binary, too? ...
it would be interesting to know whether the problem is in the GDB
interface or in the emulation part...

Yes. If we could run it ourselves under QEMU, we should be able to
check and fix.

Adding others persons who have good knowledge on this part.

There is another test that is a little more involved, which will
actually use the XER only *if* I execute the instruction twice by
setting the PC back to it again.  I can provide that if needed.

Yes please. If you have some time to adapt the test to the tests/tcg
framework, it would help. It doesn't have to be perfect.

For testing against real hardware you may also like to look at RISU (http://git.linaro.org/people/pmaydell/risu.git/about/) which already has some ppc64 generators: http://git.linaro.org/people/pmaydell/risu.git/tree/ppc64.risu.



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