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[PATCH 02/17] pnv_phb3.c: do not set 'root-bus' as bus name
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH 02/17] pnv_phb3.c: do not set 'root-bus' as bus name |
Date: |
Tue, 28 Dec 2021 16:37:51 -0300 |
All pnv-phb3-root-bus buses are being created as 'root-bus'. This
makes it impossible to, for example, add a pnv-phb3-root-port in
a specific root bus, since they all have the same name. By default
the device will be parented by the pnv-phb3 device that precedeced it in
the QEMU command line.
Moreover, this doesn't all for custom bus naming. Libvirt, for instance,
likes to name these buses as 'pcie.N', where 'N' is the index value of
the controller in the domain XML, by using the 'id' command line
attribute. At this moment this is also being ignored - the created root
bus will always be named 'root-bus'.
This patch fixes both scenarios by removing the 'root-bus' name from the
pci_register_root_bus() call. If an "id" is provided, use that.
Otherwise use 'NULL' as bus name. The 'NULL' value will be handled in
qbus_init_internal() and it will defaulted as lowercase bus type + the
global bus_id value.
After this path we can define the bus name by using the 'id' attribute:
qemu-system-ppc64 -m 4G -machine powernv8,accel=tcg \
-device pnv-phb3,chip-id=0,index=1,id=pcie.0
dev: pnv-phb3, id "pcie.0"
index = 1 (0x1)
chip-id = 0 (0x0)
x-config-reg-migration-enabled = true
bypass-iommu = false
bus: pcie.0
type pnv-phb3-root-bus
And without an 'id' we will have the following default:
qemu-system-ppc64 -m 4G -machine powernv8,accel=tcg \
-device pnv-phb3,chip-id=0,index=1
dev: pnv-phb3, id ""
index = 1 (0x1)
chip-id = 0 (0x0)
x-config-reg-migration-enabled = true
bypass-iommu = false
bus: pnv-phb3-root-bus.0
type pnv-phb3-root-bus
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/pci-host/pnv_phb3.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 130d392b3e..f1b1f109a3 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -1064,7 +1064,8 @@ static void pnv_phb3_realize(DeviceState *dev, Error
**errp)
memory_region_init(&phb->pci_mmio, OBJECT(phb), "pci-mmio",
PCI_MMIO_TOTAL_SIZE);
- pci->bus = pci_register_root_bus(dev, "root-bus",
+ pci->bus = pci_register_root_bus(dev,
+ dev->id ? dev->id : NULL,
pnv_phb3_set_irq, pnv_phb3_map_irq, phb,
&phb->pci_mmio, &phb->pci_io,
0, 4, TYPE_PNV_PHB3_ROOT_BUS);
--
2.33.1
- [PATCH 00/17] ppc/pnv: enable pnv-phb4 user devices, Daniel Henrique Barboza, 2021/12/28
- [PATCH 01/17] pnv_phb3.c: add unique chassis and slot for pnv_phb3_root_port, Daniel Henrique Barboza, 2021/12/28
- [PATCH 02/17] pnv_phb3.c: do not set 'root-bus' as bus name,
Daniel Henrique Barboza <=
- [PATCH 05/17] pnv.c: simplify pnv_phb_attach_root_port(), Daniel Henrique Barboza, 2021/12/28
- [PATCH 07/17] pnv_phb4.c: check if root port exists in rc_config functions, Daniel Henrique Barboza, 2021/12/28
- [PATCH 03/17] pnv_phb3.h: change TYPE_PNV_PHB3_ROOT_BUS name, Daniel Henrique Barboza, 2021/12/28
- [PATCH 08/17] pnv_phb4.c: introduce pnv_phb4_set_stack_phb_props(), Daniel Henrique Barboza, 2021/12/28
- [PATCH 09/17] pnv_phb4_pec.c: move pnv_pec_phb_offset() to pnv_phb4.c, Daniel Henrique Barboza, 2021/12/28
- [PATCH 04/17] pnv_phb4.c: add unique chassis and slot for pnv_phb4_root_port, Daniel Henrique Barboza, 2021/12/28
- [PATCH 06/17] pnv_phb4.c: attach default root port in phb4 realize(), Daniel Henrique Barboza, 2021/12/28
- [PATCH 10/17] pnv_phb4.c: introduce pnv_pec_init_stack_xscom(), Daniel Henrique Barboza, 2021/12/28
- [PATCH 13/17] pnv_phb4.h: turn phb into a pointer in struct PnvPhb4PecStack, Daniel Henrique Barboza, 2021/12/28
- [PATCH 12/17] pnv_phb4_pec.c: use 'default_enabled()' to init stack->phb, Daniel Henrique Barboza, 2021/12/28