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Re: [PATCH 03/10] target/ppc: Simplify powerpc_excp_7xx

From: Fabiano Rosas
Subject: Re: [PATCH 03/10] target/ppc: Simplify powerpc_excp_7xx
Date: Fri, 04 Feb 2022 13:10:54 -0300

BALATON Zoltan <balaton@eik.bme.hu> writes:

> On Thu, 3 Feb 2022, Fabiano Rosas wrote:
>> Differences from the generic powerpc_excp code:
>> - Not BookE, so some MSR bits are cleared at interrupt dispatch;
>> - No MSR_HV;
>> - No power saving states;
>> - No Hypervisor Emulation Assistance;
> The pegasos2 can run with -cpu G3 as the real hardware had a processor 
> card either with a G3 or a G4 so this will break VOF with that. I'm not 
> sure if it's worth keeping support for this though as long as the default 
> G4 works because most people would want to use a G4 anyway and those who 
> want a G3 for some reason could still use a firmware rom image instead but 

I'll bring 'sc 1' back then. I shouldn't mix the refactoring with
dropping support of things.

If you think we can drop support for the pegasos2 on the G3 let me know
and I'll send a follow up patch. Or you can send one yourself if you'd

> I wonder if there's another better place where sc 1 could be handled so it 
> could work for these cpus without needing to change these excp helpers.

I spoke to Alexey and the way forward here is to have a MMIO address for
VOF to use and remove the sc 1 usage altogether. At least for the CPUs
that wouldn't support it otherwise. I created a GitLab issue to track
that: https://gitlab.com/qemu-project/qemu/-/issues/859

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