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Re: [RFC PATCH 1/7] target/ppc: Implement xxm[tf]acc and xxsetaccz

From: Richard Henderson
Subject: Re: [RFC PATCH 1/7] target/ppc: Implement xxm[tf]acc and xxsetaccz
Date: Tue, 26 Apr 2022 15:59:44 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0

On 4/26/22 05:50, Lucas Mateus Castro(alqotel) wrote:
From: "Lucas Mateus Castro (alqotel)"<lucas.araujo@eldorado.org.br>

Implement the following PowerISA v3.1 instructions:
xxmfacc: VSX Move From Accumulator
xxmtacc: VSX Move To Accumulator
xxsetaccz: VSX Set Accumulator to Zero

The PowerISA 3.1 mentions that for the current version of the
architecture, "the hardware implementation provides the effect of ACC[i]
and VSRs 4*i to 4*i + 3 logically containing the same data" and "The
Accumulators introduce no new logical state at this time" (page 501).
For now it seems unnecessary to create new structures, so this patch
just uses ACC[i] as VSRs 4*i to 4*i+3 and therefore move to and from
accumulators are no-ops.

Signed-off-by: Lucas Mateus Castro (alqotel)<lucas.araujo@eldorado.org.br>
  target/ppc/insn32.decode            |  9 ++++++++
  target/ppc/translate/vsx-impl.c.inc | 36 +++++++++++++++++++++++++++++
  2 files changed, 45 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

+    TCGv_i64 zero = tcg_constant_i64(0);
+    for (i = 0; i < 4; i++) {
+        set_cpu_vsr(a->ra * 4 + i, zero, false);
+        set_cpu_vsr(a->ra * 4 + i, zero, true);
+    }


  tcg_gen_gvec_dup_imm(MO_64, acc_full_offset(a->ra), 64, 64, 0);


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