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Re: [PATCH RESEND v3 0/8] VDIV/VMOD Implementation

From: Daniel Henrique Barboza
Subject: Re: [PATCH RESEND v3 0/8] VDIV/VMOD Implementation
Date: Mon, 6 Jun 2022 14:49:58 -0300
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0

Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,


On 5/25/22 10:49, Lucas Mateus Castro(alqotel) wrote:
From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>

Based-on: https://gitlab.com/danielhb/qemu/-/tree/ppc-next

This patch series is an implementation of the vector divide, vector
divide extended and vector modulo instructions from PowerISA 3.1. These
are the last instructions left to be implemented from 3.1

For this resend I've rebased the patch on ppc-next, dropped one patch
that was already added as part of another patch series and added
Resolves to the last patch to the issue of implementing the ISA

The first patch are Matheus' patch, used here since the divs256 and
divu256 functions use int128_urshift.

Patches without review: 1, 3, 4 and 7

v3 changes:
     - Divided DO_VDIV_VMOD macro in 4 different new macros
     - Turned TRANS_VDIV_VMOD into a function and the instructions are
       now implemented with the TRANS macro and do_vdiv_vmod function
     - Moved clz128 to int128.h

v2 changes:
     - Dropped int128_lshift patch
     - Added missing int_min/-1 check
     - Changed invalid division to a division by 1
     - Created new macro responsible for invalid division check
       (replacing DIV_VEC, REM_VEC and the check in dives_i32/diveu_i32)
     - Turned GVecGen3 array into single element

Lucas Mateus Castro (alqotel) (8):
   target/ppc: Implemented vector divide instructions
   target/ppc: Implemented vector divide quadword
   target/ppc: Implemented vector divide extended word
   host-utils: Implemented unsigned 256-by-128 division
   host-utils: Implemented signed 256-by-128 division
   target/ppc: Implemented remaining vector divide extended
   target/ppc: Implemented vector module word/doubleword
   target/ppc: Implemented vector module quadword

  include/qemu/host-utils.h           |   3 +
  include/qemu/int128.h               |  38 ++++++
  target/ppc/helper.h                 |   8 ++
  target/ppc/insn32.decode            |  23 ++++
  target/ppc/int_helper.c             | 106 ++++++++++++++++
  target/ppc/translate/vmx-impl.c.inc | 151 +++++++++++++++++++++++
  util/host-utils.c                   | 180 ++++++++++++++++++++++++++++
  7 files changed, 509 insertions(+)

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