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Re: [PATCH v3 0/9] target/ppc: Assorted ppc target fixes

From: Daniel Henrique Barboza
Subject: Re: [PATCH v3 0/9] target/ppc: Assorted ppc target fixes
Date: Sat, 27 May 2023 15:05:35 -0300
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0

On 5/15/23 06:26, Nicholas Piggin wrote:
Hopefully these are getting close to ready now. There is still the
question about doing better with adding test cases for all this, I
haven't exactly got a good answer yet but I do have kvm-unit-tests
for most at least.

Patches 1 and 4 queued to ppc-next. Thanks,



Nicholas Piggin (9):
   target/ppc: Fix width of some 32-bit SPRs
   target/ppc: Fix PMU MMCR0[PMCjCE] bit in hflags calculation
   target/ppc: Fix instruction loading endianness in alignment interrupt
   target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward
   target/ppc: Change partition-scope translate interface
   target/ppc: Add SRR1 prefix indication to interrupt handlers
   target/ppc: Implement HEIR SPR
   target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call
   target/ppc: Better CTRL SPR implementation

  target/ppc/cpu.h         |  1 +
  target/ppc/cpu_init.c    | 41 +++++++++++++----
  target/ppc/excp_helper.c | 98 ++++++++++++++++++++++++++++++++++++----
  target/ppc/helper_regs.c |  2 +-
  target/ppc/misc_helper.c |  4 +-
  target/ppc/mmu-radix64.c | 38 +++++++++++-----
  target/ppc/power8-pmu.c  |  6 ++-
  target/ppc/translate.c   |  9 +++-
  8 files changed, 164 insertions(+), 35 deletions(-)

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