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Re: [PATCH 4/4] pnv/xive2: Handle TIMA access through all ports

From: Cédric Le Goater
Subject: Re: [PATCH 4/4] pnv/xive2: Handle TIMA access through all ports
Date: Tue, 30 May 2023 18:49:52 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0

On 5/30/23 18:40, Cédric Le Goater wrote:
On 5/30/23 18:11, Frederic Barrat wrote:
The Thread Interrupt Management Area (TIMA) can be accessed through 4
ports/snoop buses, targeted by the address. The base address of a TIMA
is using port 0 and the other ports are 0x80 apart. Using one port or
another can be useful to balance the load on the snoop buses.

and can we have some nice examples of how these ports are used ? only for
snooping or also for balancing operations ? which ones ?

The TIMA registers are in the 0x0 -> 0x3F range and there are 2
indication bits for special operations (bits 10 and 11; everything
fits on a 4k page). So the port address bits fall in between and are
"don't care" for the hardware when processing the TIMA operation. So
this patch filters out those port address bits so that a TIMA
operation can be triggered using any port.

It is also true for indirect access (through the IC BAR) and it's
actually nothing new, it was already the case on P9. Which helps here,
as the TIMA handling code is common between P9 (xive) and P10 (xive2).

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

one extra comment, since we already have one mask for the tima offsets :

     * First, check for special operations in the 2K region
    if (offset & 0x800) {

I think it would be cleaner to add some defines in the reg definition file.

Can come later.



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