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Re: [PATCH v2 17/28] target/ppc/mmu_common.c: Fix misindented qemu_log_m
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From: |
Nicholas Piggin |
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Subject: |
Re: [PATCH v2 17/28] target/ppc/mmu_common.c: Fix misindented qemu_log_mask() calls |
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Date: |
Tue, 07 May 2024 20:05:14 +1000 |
On Thu May 2, 2024 at 9:43 AM AEST, BALATON Zoltan wrote:
> Fix several qemu_log_mask() calls that are misindented.
Acked-by: Nicholas Piggin <npiggin@gmail.com>
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> target/ppc/mmu_common.c | 42 ++++++++++++++++++++---------------------
> 1 file changed, 20 insertions(+), 22 deletions(-)
>
> diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
> index ebf18a751c..28847c32f2 100644
> --- a/target/ppc/mmu_common.c
> +++ b/target/ppc/mmu_common.c
> @@ -297,8 +297,8 @@ static int ppc6xx_tlb_get_bat(CPUPPCState *env, mmu_ctx_t
> *ctx,
> int ret = -1;
> bool ifetch = access_type == MMU_INST_FETCH;
>
> - qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT v " TARGET_FMT_lx "\n", __func__,
> - ifetch ? 'I' : 'D', virtual);
> + qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT v " TARGET_FMT_lx "\n", __func__,
> + ifetch ? 'I' : 'D', virtual);
> if (ifetch) {
> BATlt = env->IBAT[1];
> BATut = env->IBAT[0];
> @@ -312,9 +312,9 @@ static int ppc6xx_tlb_get_bat(CPUPPCState *env, mmu_ctx_t
> *ctx,
> BEPIu = *BATu & 0xF0000000;
> BEPIl = *BATu & 0x0FFE0000;
> bat_size_prot(env, &bl, &valid, &prot, BATu, BATl);
> - qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT%d v " TARGET_FMT_lx " BATu "
> - TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n", __func__,
> - ifetch ? 'I' : 'D', i, virtual, *BATu, *BATl);
> + qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT%d v " TARGET_FMT_lx " BATu "
> + TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n", __func__,
> + ifetch ? 'I' : 'D', i, virtual, *BATu, *BATl);
> if ((virtual & 0xF0000000) == BEPIu &&
> ((virtual & 0x0FFE0000) & ~bl) == BEPIl) {
> /* BAT matches */
> @@ -346,12 +346,11 @@ static int ppc6xx_tlb_get_bat(CPUPPCState *env,
> mmu_ctx_t *ctx,
> BEPIu = *BATu & 0xF0000000;
> BEPIl = *BATu & 0x0FFE0000;
> bl = (*BATu & 0x00001FFC) << 15;
> - qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT%d v "
> - TARGET_FMT_lx " BATu " TARGET_FMT_lx
> - " BATl " TARGET_FMT_lx "\n\t" TARGET_FMT_lx "
> "
> - TARGET_FMT_lx " " TARGET_FMT_lx "\n",
> - __func__, ifetch ? 'I' : 'D', i, virtual,
> - *BATu, *BATl, BEPIu, BEPIl, bl);
> + qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT%d v " TARGET_FMT_lx
> + " BATu " TARGET_FMT_lx " BATl " TARGET_FMT_lx
> + "\n\t" TARGET_FMT_lx " " TARGET_FMT_lx " "
> + TARGET_FMT_lx "\n", __func__, ifetch ? 'I' :
> 'D',
> + i, virtual, *BATu, *BATl, BEPIu, BEPIl, bl);
> }
> }
> }
> @@ -400,9 +399,8 @@ static int mmu6xx_get_physical_address(CPUPPCState *env,
> mmu_ctx_t *ctx,
> hash = vsid ^ pgidx;
> ctx->ptem = (vsid << 7) | (pgidx >> 10);
>
> - qemu_log_mask(CPU_LOG_MMU,
> - "pte segment: key=%d ds %d nx %d vsid " TARGET_FMT_lx "\n",
> - ctx->key, ds, ctx->nx, vsid);
> + qemu_log_mask(CPU_LOG_MMU, "pte segment: key=%d ds %d nx %d vsid "
> + TARGET_FMT_lx "\n", ctx->key, ds, ctx->nx, vsid);
> ret = -1;
> if (!ds) {
> /* Check if instruction fetch is allowed, if needed */
> @@ -599,9 +597,9 @@ static int mmu40x_get_physical_address(CPUPPCState *env,
> mmu_ctx_t *ctx,
> return 0;
> }
> }
> - qemu_log_mask(CPU_LOG_MMU, "%s: access refused " TARGET_FMT_lx
> - " => " HWADDR_FMT_plx
> - " %d %d\n", __func__, address, raddr, ctx->prot, ret);
> + qemu_log_mask(CPU_LOG_MMU, "%s: access refused " TARGET_FMT_lx
> + " => " HWADDR_FMT_plx " %d %d\n",
> + __func__, address, raddr, ctx->prot, ret);
>
> return ret;
> }
> @@ -713,11 +711,11 @@ int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t
> *tlb, hwaddr *raddrp,
> }
>
> mask = ~(booke206_tlb_to_page_size(env, tlb) - 1);
> - qemu_log_mask(CPU_LOG_MMU, "%s: TLB ADDR=0x" TARGET_FMT_lx
> - " PID=0x%x MAS1=0x%x MAS2=0x%" PRIx64 " mask=0x%"
> - HWADDR_PRIx " MAS7_3=0x%" PRIx64 " MAS8=0x%" PRIx32 "\n",
> - __func__, address, pid, tlb->mas1, tlb->mas2, mask,
> - tlb->mas7_3, tlb->mas8);
> + qemu_log_mask(CPU_LOG_MMU, "%s: TLB ADDR=0x" TARGET_FMT_lx
> + " PID=0x%x MAS1=0x%x MAS2=0x%" PRIx64 " mask=0x%"
> + HWADDR_PRIx " MAS7_3=0x%" PRIx64 " MAS8=0x%" PRIx32 "\n",
> + __func__, address, pid, tlb->mas1, tlb->mas2, mask,
> + tlb->mas7_3, tlb->mas8);
>
> /* Check PID */
> tlb_pid = (tlb->mas1 & MAS1_TID_MASK) >> MAS1_TID_SHIFT;
- Re: [PATCH v2 12/28] target/ppc/mmu_common.c: Split out BookE cases before checking real mode, (continued)
- [PATCH v2 13/28] target/ppc/mmu_common.c: Split off real mode cases in get_physical_address_wtlb(), BALATON Zoltan, 2024/05/01
- [PATCH v2 07/28] target/ppc/mmu_common.c: Remove unneeded local variable, BALATON Zoltan, 2024/05/01
- [PATCH v2 14/28] target/ppc/mmu_common.c: Inline and remove check_physical(), BALATON Zoltan, 2024/05/01
- [PATCH v2 16/28] target/ppc/mmu_common.c: Simplify mmubooke206_get_physical_address(), BALATON Zoltan, 2024/05/01
- [PATCH v2 17/28] target/ppc/mmu_common.c: Fix misindented qemu_log_mask() calls, BALATON Zoltan, 2024/05/01
- Re: [PATCH v2 17/28] target/ppc/mmu_common.c: Fix misindented qemu_log_mask() calls,
Nicholas Piggin <=
- [PATCH v2 10/28] target/ppc/mmu_common.c: Introduce mmu6xx_get_physical_address(), BALATON Zoltan, 2024/05/01
- [PATCH v2 15/28] target/ppc/mmu_common.c: Simplify mmubooke_get_physical_address(), BALATON Zoltan, 2024/05/01
- [PATCH v2 18/28] target/ppc/mmu_common.c: Deindent ppc_jumbo_xlate(), BALATON Zoltan, 2024/05/01
- [PATCH v2 20/28] target/ppc/mmu_common.c: Make get_physical_address_wtlb() static, BALATON Zoltan, 2024/05/01
- [PATCH v2 22/28] target/ppc: Remove ppc_hash32_pp_prot() and reuse common function, BALATON Zoltan, 2024/05/01