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[PATCH v5 09/32] target/ppc/mmu_common.c: Eliminate ret from mmu6xx_get_
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From: |
BALATON Zoltan |
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Subject: |
[PATCH v5 09/32] target/ppc/mmu_common.c: Eliminate ret from mmu6xx_get_physical_address() |
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Date: |
Thu, 09 May 2024 22:25:43 +0200 (CEST) |
Return directly, which is simpler than dragging a return value through
multpile if and else blocks.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/mmu_common.c | 84 +++++++++++++++++++----------------------
1 file changed, 39 insertions(+), 45 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 89bfd9aa45..03d9e6bfda 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -386,7 +386,6 @@ static int mmu6xx_get_physical_address(CPUPPCState *env,
mmu_ctx_t *ctx,
target_ulong vsid, sr, pgidx;
int ds, target_page_bits;
bool pr;
- int ret;
/* First try to find a BAT entry if there are any */
if (env->nb_BATs && get_bat_6xx_tlb(env, ctx, eaddr, access_type) == 0) {
@@ -419,7 +418,6 @@ static int mmu6xx_get_physical_address(CPUPPCState *env,
mmu_ctx_t *ctx,
qemu_log_mask(CPU_LOG_MMU,
"pte segment: key=%d ds %d nx %d vsid " TARGET_FMT_lx "\n",
ctx->key, ds, ctx->nx, vsid);
- ret = -1;
if (!ds) {
/* Check if instruction fetch is allowed, if needed */
if (type == ACCESS_CODE && ctx->nx) {
@@ -436,51 +434,47 @@ static int mmu6xx_get_physical_address(CPUPPCState *env,
mmu_ctx_t *ctx,
/* Initialize real address with an invalid value */
ctx->raddr = (hwaddr)-1ULL;
/* Software TLB search */
- ret = ppc6xx_tlb_check(env, ctx, eaddr, access_type);
- } else {
- qemu_log_mask(CPU_LOG_MMU, "direct store...\n");
- /* Direct-store segment : absolutely *BUGGY* for now */
-
- switch (type) {
- case ACCESS_INT:
- /* Integer load/store : only access allowed */
- break;
- case ACCESS_CODE:
- /* No code fetch is allowed in direct-store areas */
- return -4;
- case ACCESS_FLOAT:
- /* Floating point load/store */
- return -4;
- case ACCESS_RES:
- /* lwarx, ldarx or srwcx. */
- return -4;
- case ACCESS_CACHE:
- /*
- * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi
- *
- * Should make the instruction do no-op. As it already do
- * no-op, it's quite easy :-)
- */
- ctx->raddr = eaddr;
- return 0;
- case ACCESS_EXT:
- /* eciwx or ecowx */
- return -4;
- default:
- qemu_log_mask(CPU_LOG_MMU, "ERROR: instruction should not need "
- "address translation\n");
- return -4;
- }
- if ((access_type == MMU_DATA_STORE || ctx->key != 1) &&
- (access_type == MMU_DATA_LOAD || ctx->key != 0)) {
- ctx->raddr = eaddr;
- ret = 2;
- } else {
- ret = -2;
- }
+ return ppc6xx_tlb_check(env, ctx, eaddr, access_type);
}
- return ret;
+ /* Direct-store segment : absolutely *BUGGY* for now */
+ qemu_log_mask(CPU_LOG_MMU, "direct store...\n");
+ switch (type) {
+ case ACCESS_INT:
+ /* Integer load/store : only access allowed */
+ break;
+ case ACCESS_CODE:
+ /* No code fetch is allowed in direct-store areas */
+ return -4;
+ case ACCESS_FLOAT:
+ /* Floating point load/store */
+ return -4;
+ case ACCESS_RES:
+ /* lwarx, ldarx or srwcx. */
+ return -4;
+ case ACCESS_CACHE:
+ /*
+ * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi
+ *
+ * Should make the instruction do no-op. As it already do
+ * no-op, it's quite easy :-)
+ */
+ ctx->raddr = eaddr;
+ return 0;
+ case ACCESS_EXT:
+ /* eciwx or ecowx */
+ return -4;
+ default:
+ qemu_log_mask(CPU_LOG_MMU, "ERROR: instruction should not need address"
+ " translation\n");
+ return -4;
+ }
+ if ((access_type == MMU_DATA_STORE || ctx->key != 1) &&
+ (access_type == MMU_DATA_LOAD || ctx->key != 0)) {
+ ctx->raddr = eaddr;
+ return 2;
+ }
+ return -2;
}
/* Generic TLB check function for embedded PowerPC implementations */
--
2.30.9
- [PATCH v5 12/32] target/ppc/mmu_common.c: Inline and remove check_physical(), (continued)
- [PATCH v5 12/32] target/ppc/mmu_common.c: Inline and remove check_physical(), BALATON Zoltan, 2024/05/09
- [PATCH v5 18/32] target/ppc/mmu_common.c: Don't use mmu_ctx_t in mmubooke206_get_physical_address(), BALATON Zoltan, 2024/05/09
- [PATCH v5 22/32] target/ppc/mmu_common.c: Eliminate get_physical_address_wtlb(), BALATON Zoltan, 2024/05/09
- [PATCH v5 14/32] target/ppc/mmu_common.c: Deindent ppc_jumbo_xlate(), BALATON Zoltan, 2024/05/09
- [PATCH v5 11/32] target/ppc/mmu_common.c: Split off real mode cases in get_physical_address_wtlb(), BALATON Zoltan, 2024/05/09
- [PATCH v5 05/32] target/ppc/mmu_common.c: Drop cases for unimplemented MPC8xx MMU, BALATON Zoltan, 2024/05/09
- [PATCH v5 19/32] target/ppc: Remove pp_check() and reuse ppc_hash32_pp_prot(), BALATON Zoltan, 2024/05/09
- [PATCH v5 13/32] target/ppc/mmu_common.c: Fix misindented qemu_log_mask() calls, BALATON Zoltan, 2024/05/09
- [PATCH v5 20/32] target/ppc/mmu_common.c: Remove BookE from direct store handling, BALATON Zoltan, 2024/05/09
- [PATCH v5 17/32] target/ppc/mmu_common.c: Don't use mmu_ctx_t in mmubooke_get_physical_address(), BALATON Zoltan, 2024/05/09
- [PATCH v5 09/32] target/ppc/mmu_common.c: Eliminate ret from mmu6xx_get_physical_address(),
BALATON Zoltan <=
- [PATCH v5 15/32] target/ppc/mmu_common.c: Replace hard coded constants in ppc_jumbo_xlate(), BALATON Zoltan, 2024/05/09
- [PATCH v5 16/32] target/ppc/mmu_common.c: Don't use mmu_ctx_t for mmu40x_get_physical_address(), BALATON Zoltan, 2024/05/09
- [PATCH v5 23/32] target/ppc/mmu_common.c: Move mmu_ctx_t type to mmu_common.c, BALATON Zoltan, 2024/05/09
- [PATCH v5 21/32] target/ppc/mmu_common.c: Split off BookE handling from ppc_jumbo_xlate(), BALATON Zoltan, 2024/05/09
- [PATCH v5 24/32] target/ppc/mmu_common.c: Simplify ppc_booke_xlate() part 1, BALATON Zoltan, 2024/05/09
- [PATCH v5 25/32] target/ppc/mmu_common.c: Simplify ppc_booke_xlate() part 2, BALATON Zoltan, 2024/05/09
- [PATCH v5 26/32] target/ppc: Remove id_tlbs flag from CPU env, BALATON Zoltan, 2024/05/09
- [PATCH v5 28/32] target/ppc/mmu-hash32.c: Drop a local variable, BALATON Zoltan, 2024/05/09
- [PATCH v5 29/32] target/ppc/mmu-radix64.c: Drop a local variable, BALATON Zoltan, 2024/05/09
- [PATCH v5 32/32] target/ppc/mmu_common.c: Remove work around for spurious warnings, BALATON Zoltan, 2024/05/09