[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 27/72] target/ppc: Remove redundant MEMOP_GET_SIZE macro
|
From: |
Nicholas Piggin |
|
Subject: |
[PULL 27/72] target/ppc: Remove redundant MEMOP_GET_SIZE macro |
|
Date: |
Fri, 24 May 2024 09:07:00 +1000 |
There is a memop_size() function for this.
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/translate.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 6c103dafe0..cf42dfcc9d 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -2840,8 +2840,6 @@ static void gen_isync(DisasContext *ctx)
ctx->base.is_jmp = DISAS_EXIT_UPDATE;
}
-#define MEMOP_GET_SIZE(x) (1 << ((x) & MO_SIZE))
-
static void gen_load_locked(DisasContext *ctx, MemOp memop)
{
TCGv gpr = cpu_gpr[rD(ctx->opcode)];
@@ -2874,7 +2872,7 @@ static void gen_fetch_inc_conditional(DisasContext *ctx,
MemOp memop,
TCGv u = tcg_temp_new();
tcg_gen_qemu_ld_tl(t, EA, ctx->mem_idx, memop);
- tcg_gen_addi_tl(t2, EA, MEMOP_GET_SIZE(memop));
+ tcg_gen_addi_tl(t2, EA, memop_size(memop));
tcg_gen_qemu_ld_tl(t2, t2, ctx->mem_idx, memop);
tcg_gen_addi_tl(u, t, addend);
@@ -2884,7 +2882,7 @@ static void gen_fetch_inc_conditional(DisasContext *ctx,
MemOp memop,
tcg_gen_qemu_st_tl(u, EA, ctx->mem_idx, memop);
/* RT = (t != t2 ? t : u = 1<<(s*8-1)) */
- tcg_gen_movi_tl(u, 1 << (MEMOP_GET_SIZE(memop) * 8 - 1));
+ tcg_gen_movi_tl(u, 1 << (memop_size(memop) * 8 - 1));
tcg_gen_movcond_tl(cond, cpu_gpr[rD(ctx->opcode)], t, t2, t, u);
}
@@ -3046,7 +3044,7 @@ static void gen_st_atomic(DisasContext *ctx, MemOp memop)
TCGv ea_plus_s = tcg_temp_new();
tcg_gen_qemu_ld_tl(t, EA, ctx->mem_idx, memop);
- tcg_gen_addi_tl(ea_plus_s, EA, MEMOP_GET_SIZE(memop));
+ tcg_gen_addi_tl(ea_plus_s, EA, memop_size(memop));
tcg_gen_qemu_ld_tl(t2, ea_plus_s, ctx->mem_idx, memop);
tcg_gen_movcond_tl(TCG_COND_EQ, s, t, t2, src, t);
tcg_gen_movcond_tl(TCG_COND_EQ, s2, t, t2, src, t2);
--
2.43.0
- [PULL 17/72] target/ppc: Move cmp{rb, eqb}, tw[i], td[i], isel instructions to decodetree., (continued)
- [PULL 17/72] target/ppc: Move cmp{rb, eqb}, tw[i], td[i], isel instructions to decodetree., Nicholas Piggin, 2024/05/23
- [PULL 20/72] target/ppc: Move VMX integer logical instructions to decodetree., Nicholas Piggin, 2024/05/23
- [PULL 21/72] target/ppc: Move VMX integer max/min instructions to decodetree., Nicholas Piggin, 2024/05/23
- [PULL 19/72] target/ppc: Move VMX storage access instructions to decodetree, Nicholas Piggin, 2024/05/23
- [PULL 24/72] Add support for the clrbhrb and mfbhrbe instructions., Nicholas Piggin, 2024/05/23
- [PULL 26/72] target/ppc: larx/stcx generation need only apply DEF_MEMOP() once, Nicholas Piggin, 2024/05/23
- [PULL 22/72] This commit is preparatory to the addition of Branch History Rolling Buffer (BHRB) functionality, which is being provided today starting with the P8 processor., Nicholas Piggin, 2024/05/23
- [PULL 28/72] target/ppc: Make checkstop actually stop the system, Nicholas Piggin, 2024/05/23
- [PULL 23/72] This commit continues adding support for the Branch History Rolling Buffer (BHRB) as is provided starting with the P8 processor and continuing with its successors. This commit is limited to the recording and filtering of taken branches., Nicholas Piggin, 2024/05/23
- [PULL 29/72] target/ppc: improve checkstop logging, Nicholas Piggin, 2024/05/23
- [PULL 27/72] target/ppc: Remove redundant MEMOP_GET_SIZE macro,
Nicholas Piggin <=
- [PULL 32/72] target/ppc: Add PPR32 SPR, Nicholas Piggin, 2024/05/23
- [PULL 33/72] target/ppc: add helper to write per-LPAR SPRs, Nicholas Piggin, 2024/05/23
- [PULL 30/72] target/ppc: Implement attn instruction on BookS 64-bit processors, Nicholas Piggin, 2024/05/23
- [PULL 35/72] target/ppc: Add SMT support to PTCR SPR, Nicholas Piggin, 2024/05/23
- [PULL 34/72] target/ppc: Add SMT support to simple SPRs, Nicholas Piggin, 2024/05/23
- [PULL 25/72] Adds migration support for Branch History Rolling Buffer (BHRB) internal state., Nicholas Piggin, 2024/05/23
- [PULL 42/72] target/ppc/mmu_common.c: Remove unneeded local variable, Nicholas Piggin, 2024/05/23
- [PULL 36/72] target/ppc: Implement LDBAR, TTR SPRs, Nicholas Piggin, 2024/05/23
- [PULL 37/72] target/ppc: Implement SPRC/SPRD SPRs, Nicholas Piggin, 2024/05/23