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[PULL 33/72] target/ppc: add helper to write per-LPAR SPRs
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From: |
Nicholas Piggin |
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Subject: |
[PULL 33/72] target/ppc: add helper to write per-LPAR SPRs |
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Date: |
Fri, 24 May 2024 09:07:06 +1000 |
An SPR can be either per-thread, per-core, or per-LPAR. Per-LPAR means
per-thread or per-core, depending on 1LPAR mode.
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/spr_common.h | 2 ++
target/ppc/translate.c | 28 ++++++++++++++++++++++++++++
2 files changed, 30 insertions(+)
diff --git a/target/ppc/spr_common.h b/target/ppc/spr_common.h
index 9e40b3b608..85f73b860b 100644
--- a/target/ppc/spr_common.h
+++ b/target/ppc/spr_common.h
@@ -83,6 +83,8 @@ void spr_read_generic(DisasContext *ctx, int gprn, int sprn);
void spr_write_generic(DisasContext *ctx, int sprn, int gprn);
void spr_write_generic32(DisasContext *ctx, int sprn, int gprn);
void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn);
+void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn);
+void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn);
void spr_write_MMCR0(DisasContext *ctx, int sprn, int gprn);
void spr_write_MMCR1(DisasContext *ctx, int sprn, int gprn);
void spr_write_MMCRA(DisasContext *ctx, int sprn, int gprn);
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index fb05047d95..7b525020ef 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -473,6 +473,34 @@ void spr_core_write_generic(DisasContext *ctx, int sprn,
int gprn)
spr_store_dump_spr(sprn);
}
+void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn)
+{
+ TCGv t0;
+
+ if (!(ctx->flags & POWERPC_FLAG_SMT)) {
+ spr_write_generic32(ctx, sprn, gprn);
+ return;
+ }
+
+ if (!gen_serialize(ctx)) {
+ return;
+ }
+
+ t0 = tcg_temp_new();
+ tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]);
+ gen_helper_spr_core_write_generic(tcg_env, tcg_constant_i32(sprn), t0);
+ spr_store_dump_spr(sprn);
+}
+
+void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn)
+{
+ if (ctx->flags & POWERPC_FLAG_SMT_1LPAR) {
+ spr_core_write_generic(ctx, sprn, gprn);
+ } else {
+ spr_write_generic(ctx, sprn, gprn);
+ }
+}
+
static void spr_write_CTRL_ST(DisasContext *ctx, int sprn, int gprn)
{
/* This does not implement >1 thread */
--
2.43.0
- [PULL 21/72] target/ppc: Move VMX integer max/min instructions to decodetree., (continued)
- [PULL 21/72] target/ppc: Move VMX integer max/min instructions to decodetree., Nicholas Piggin, 2024/05/23
- [PULL 19/72] target/ppc: Move VMX storage access instructions to decodetree, Nicholas Piggin, 2024/05/23
- [PULL 24/72] Add support for the clrbhrb and mfbhrbe instructions., Nicholas Piggin, 2024/05/23
- [PULL 26/72] target/ppc: larx/stcx generation need only apply DEF_MEMOP() once, Nicholas Piggin, 2024/05/23
- [PULL 22/72] This commit is preparatory to the addition of Branch History Rolling Buffer (BHRB) functionality, which is being provided today starting with the P8 processor., Nicholas Piggin, 2024/05/23
- [PULL 28/72] target/ppc: Make checkstop actually stop the system, Nicholas Piggin, 2024/05/23
- [PULL 23/72] This commit continues adding support for the Branch History Rolling Buffer (BHRB) as is provided starting with the P8 processor and continuing with its successors. This commit is limited to the recording and filtering of taken branches., Nicholas Piggin, 2024/05/23
- [PULL 29/72] target/ppc: improve checkstop logging, Nicholas Piggin, 2024/05/23
- [PULL 27/72] target/ppc: Remove redundant MEMOP_GET_SIZE macro, Nicholas Piggin, 2024/05/23
- [PULL 32/72] target/ppc: Add PPR32 SPR, Nicholas Piggin, 2024/05/23
- [PULL 33/72] target/ppc: add helper to write per-LPAR SPRs,
Nicholas Piggin <=
- [PULL 30/72] target/ppc: Implement attn instruction on BookS 64-bit processors, Nicholas Piggin, 2024/05/23
- [PULL 35/72] target/ppc: Add SMT support to PTCR SPR, Nicholas Piggin, 2024/05/23
- [PULL 34/72] target/ppc: Add SMT support to simple SPRs, Nicholas Piggin, 2024/05/23
- [PULL 25/72] Adds migration support for Branch History Rolling Buffer (BHRB) internal state., Nicholas Piggin, 2024/05/23
- [PULL 42/72] target/ppc/mmu_common.c: Remove unneeded local variable, Nicholas Piggin, 2024/05/23
- [PULL 36/72] target/ppc: Implement LDBAR, TTR SPRs, Nicholas Piggin, 2024/05/23
- [PULL 37/72] target/ppc: Implement SPRC/SPRD SPRs, Nicholas Piggin, 2024/05/23
- [PULL 31/72] target/ppc: BookE DECAR SPR is 32-bit, Nicholas Piggin, 2024/05/23
- [PULL 38/72] target/ppc: add SMT support to msgsnd broadcast, Nicholas Piggin, 2024/05/23