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[PULL 36/72] target/ppc: Implement LDBAR, TTR SPRs
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From: |
Nicholas Piggin |
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Subject: |
[PULL 36/72] target/ppc: Implement LDBAR, TTR SPRs |
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Date: |
Fri, 24 May 2024 09:07:09 +1000 |
LDBAR, TTR are a Power-specific SPRs. These simple implementations
are enough for IBM proprietary firmware for now.
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/cpu.h | 2 ++
target/ppc/cpu_init.c | 10 ++++++++++
2 files changed, 12 insertions(+)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 141cbefb4c..823be85d03 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2098,6 +2098,7 @@ void ppc_compat_add_property(Object *obj, const char
*name,
#define SPR_DEXCR (0x33C)
#define SPR_IC (0x350)
#define SPR_VTB (0x351)
+#define SPR_LDBAR (0x352)
#define SPR_MMCRC (0x353)
#define SPR_PSSCR (0x357)
#define SPR_440_INV0 (0x370)
@@ -2144,6 +2145,7 @@ void ppc_compat_add_property(Object *obj, const char
*name,
#define SPR_440_IVLIM (0x399)
#define SPR_TSCR (0x399)
#define SPR_750_DMAU (0x39A)
+#define SPR_POWER_TTR (0x39A)
#define SPR_750_DMAL (0x39B)
#define SPR_440_RSTCFG (0x39B)
#define SPR_BOOKE_DCDBTRL (0x39C)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 415cc7a4e2..d181adc5f1 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -5767,6 +5767,16 @@ static void register_power_common_book4_sprs(CPUPPCState
*env)
&spr_access_nop, &spr_write_generic,
&spr_access_nop, &spr_write_generic,
0x00000000);
+ spr_register_hv(env, SPR_LDBAR, "LDBAR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_core_lpar_write_generic,
+ 0x00000000);
+ spr_register_hv(env, SPR_POWER_TTR, "TTR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_core_write_generic,
+ 0x00000000);
#endif
}
--
2.43.0
- [PULL 23/72] This commit continues adding support for the Branch History Rolling Buffer (BHRB) as is provided starting with the P8 processor and continuing with its successors. This commit is limited to the recording and filtering of taken branches., (continued)
- [PULL 23/72] This commit continues adding support for the Branch History Rolling Buffer (BHRB) as is provided starting with the P8 processor and continuing with its successors. This commit is limited to the recording and filtering of taken branches., Nicholas Piggin, 2024/05/23
- [PULL 29/72] target/ppc: improve checkstop logging, Nicholas Piggin, 2024/05/23
- [PULL 27/72] target/ppc: Remove redundant MEMOP_GET_SIZE macro, Nicholas Piggin, 2024/05/23
- [PULL 32/72] target/ppc: Add PPR32 SPR, Nicholas Piggin, 2024/05/23
- [PULL 33/72] target/ppc: add helper to write per-LPAR SPRs, Nicholas Piggin, 2024/05/23
- [PULL 30/72] target/ppc: Implement attn instruction on BookS 64-bit processors, Nicholas Piggin, 2024/05/23
- [PULL 35/72] target/ppc: Add SMT support to PTCR SPR, Nicholas Piggin, 2024/05/23
- [PULL 34/72] target/ppc: Add SMT support to simple SPRs, Nicholas Piggin, 2024/05/23
- [PULL 25/72] Adds migration support for Branch History Rolling Buffer (BHRB) internal state., Nicholas Piggin, 2024/05/23
- [PULL 42/72] target/ppc/mmu_common.c: Remove unneeded local variable, Nicholas Piggin, 2024/05/23
- [PULL 36/72] target/ppc: Implement LDBAR, TTR SPRs,
Nicholas Piggin <=
- [PULL 37/72] target/ppc: Implement SPRC/SPRD SPRs, Nicholas Piggin, 2024/05/23
- [PULL 31/72] target/ppc: BookE DECAR SPR is 32-bit, Nicholas Piggin, 2024/05/23
- [PULL 38/72] target/ppc: add SMT support to msgsnd broadcast, Nicholas Piggin, 2024/05/23
- [PULL 39/72] target/ppc: Remove unused struct 'mmu_ctx_hash32', Nicholas Piggin, 2024/05/23
- [PULL 40/72] target/ppc: Remove unused helper, Nicholas Piggin, 2024/05/23
- [PULL 48/72] target/ppc/mmu_common.c: Eliminate ret from mmu6xx_get_physical_address(), Nicholas Piggin, 2024/05/23
- [PULL 41/72] target/ppc/mmu_common.c: Move calculation of a value closer to its usage, Nicholas Piggin, 2024/05/23
- [PULL 44/72] target/ppc/mmu_common.c: Drop cases for unimplemented MPC8xx MMU, Nicholas Piggin, 2024/05/23
- [PULL 45/72] target/ppc/mmu_common.c: Introduce mmu6xx_get_physical_address(), Nicholas Piggin, 2024/05/23
- [PULL 43/72] target/ppc/mmu_common.c: Simplify checking for real mode, Nicholas Piggin, 2024/05/23