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Re: [RFC PATCH 06/10] ppc: Add a core_index to CPUPPCState for SMT vCPUs
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From: |
Nicholas Piggin |
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Subject: |
Re: [RFC PATCH 06/10] ppc: Add a core_index to CPUPPCState for SMT vCPUs |
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Date: |
Wed, 29 May 2024 10:28:32 +1000 |
On Tue May 28, 2024 at 6:52 PM AEST, Harsh Prateek Bora wrote:
> corrected typo, it's bitwise.
>
> On 5/28/24 14:18, Harsh Prateek Bora wrote:
> >> - (POWERPC_CPU(cs)->env.spr_cb[SPR_PIR].default_value &
> >> ~(cs->nr_threads - 1))
> >> + (POWERPC_CPU(cs)->env.core_index)
> >
> > Dont we want to keep the bitwise & with ~(cs->nr_threads - 1) ?
> > How's it taken care ?
For these accessors it actually just wants to have something that
compares if a CPU belongs to the same core or not, so exact value
doesn't really matter.
Maybe the helpers should do that comparison. It could possibly even
be a class method to be really clean, although that's more costly
to call (but writing to a SMT shared register is pretty costly anyway
so maybe doesn't matter).
I'll think a bit more.
Thanks,
Nick
- Re: [RFC PATCH 04/10] ppc/pnv: specialise init for powernv8/9/10 machines, (continued)
[RFC PATCH 06/10] ppc: Add a core_index to CPUPPCState for SMT vCPUs, Nicholas Piggin, 2024/05/26
[RFC PATCH 07/10] target/ppc: Add helpers to check for SMT sibling threads, Nicholas Piggin, 2024/05/26
[RFC PATCH 08/10] ppc/pnv: Invert the design for big-core machine modelling, Nicholas Piggin, 2024/05/26
Re: [RFC PATCH 08/10] ppc/pnv: Invert the design for big-core machine modelling, Harsh Prateek Bora, 2024/05/29