Re: [PATCH 00/26] hw/ppc: Prefer HumanReadableText over Monitor

[Philippe Mathieu-Daudé]

On 10/6/24 10:19, Cédric Le Goater wrote:
> On 6/10/24 8:20 AM, Philippe Mathieu-Daudé wrote:
> > Hi,
> >
> > This series remove uses of Monitor in hw/ppc/,
> > replacing by the more generic HumanReadableText.
> > Care is taken to keep the commit bisectables by
> > updating functions one by one, also easing review.
>
> Did you do any testing ? POWER[8-10] CPUs on pseries and powernv machines
> should be checked. A bit tedious I agree but not that long.

I ran these smoke tests comparing monitor output with baseline:

$ ./qemu-system-ppc64 -M powernv8 -S -monitor stdio
QEMU 9.0.50 monitor - type 'help' for more information
(qemu) info pic
CPU 0 XIRR=00000000 (0x0) PP=ff MFRR=ff
ICS 1000..1005 0x14c03d9c0
  1000 LSI ff 00
  1001 LSI ff 00
  1002 LSI ff 00
  1003 LSI ff 00
  1004 LSI ff 00
  1005 LSI ff 00
ICS    0.. 7ff 0x14c0e93e8
ICS    0..   7 0x14c0e9328
     0 LSI ff 00
     1 LSI ff 00
     2 LSI ff 00
     3 LSI ff 00
     4 LSI ff 00
     5 LSI ff 00
     6 LSI ff 00
     7 LSI ff 00
ICS    0.. 7ff 0x14c16ffe8
ICS    0..   7 0x14c16ff28
     0 LSI ff 00
     1 LSI ff 00
     2 LSI ff 00
     3 LSI ff 00
     4 LSI ff 00
     5 LSI ff 00
     6 LSI ff 00
     7 LSI ff 00
ICS    0.. 7ff 0x14c2177e8
ICS    0..   7 0x14c217728
     0 LSI ff 00
     1 LSI ff 00
     2 LSI ff 00
     3 LSI ff 00
     4 LSI ff 00
     5 LSI ff 00
     6 LSI ff 00
     7 LSI ff 00
Interrupt controller information not available for 
power8_v2.0-powerpc64-cpu.
(qemu) q

$ ./qemu-system-ppc64 -M pseries -cpu power10 -S -monitor stdio
QEMU 9.0.50 monitor - type 'help' for more information
qemu-system-ppc64: warning: TCG doesn't support requested feature, 
cap-cfpc=workaround
qemu-system-ppc64: warning: TCG doesn't support requested feature, 
cap-sbbc=workaround
qemu-system-ppc64: warning: TCG doesn't support requested feature, 
cap-ibs=workaround
qemu-system-ppc64: warning: TCG doesn't support requested feature, 
cap-ccf-assist=on
(qemu) info pic
CPU 0 XIRR=00000000 (0x0) PP=ff MFRR=ff
ICS 1000..1fff 0x600003b05b00
  1000 MSI ff 00
  1001 MSI ff 00
  1100 MSI ff 00
  1101 MSI ff 00
  1102 MSI ff 00
  1103 MSI ff 00
  1200 LSI ff 00
  1201 LSI ff 00
  1202 LSI ff 00
  1203 LSI ff 00
irqchip: emulated
Interrupt controller information not available for 
power10_v2.0-powerpc64-cpu.
(qemu) q