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[Qemu-riscv] Contribution procedures for RISC-V QEMU

From: Fabien Chouteau
Subject: [Qemu-riscv] Contribution procedures for RISC-V QEMU
Date: Tue, 27 Nov 2018 13:13:26 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1

Hi everyone,

I have identified two problems with sifive_clint.c in qemu.org branch.

One of them seems to be fixed in github.com/riscv/riscv-qemu/commit/6835068 but
not merged in the qemu.org.

The other is about integer overflow in sifive_clint_write_timecmp() and not
fixed anywhere, as far as I know.

So I have two questions:

 - What is the contribution procedure for RISC-V QEMU? Should I send a patch
   here or use GitHub?

 - When will `6835068` be merged in qemu.org branch?

Thanks in advance,

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