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Re: [Qemu-riscv] [PATCH v8 0/4] Connect a PCIe host and graphics support

From: Palmer Dabbelt
Subject: Re: [Qemu-riscv] [PATCH v8 0/4] Connect a PCIe host and graphics support to RISC-V
Date: Tue, 11 Dec 2018 14:48:31 -0800 (PST)

On Tue, 11 Dec 2018 14:37:07 PST (-0800), Alistair Francis wrote:
This series is now ready to be merged, all of the patches are reviewed
and tested.

Palmer can you take this with all the other RISC-V patches sent during
the freeze?

Yep, I'll be collecting everything this week.


 - Drop SiFive U support
 - Drop legacy -nic support
 - Small other review changes
 - Fix the GPEX memory mapping thanks to Bin Meng
 - Fix the interrupt mapping thanks to Logan Gunthorpe
 - Fix the interrupt issue for the GPEX device
 - Rebase
 - Include pci.mak in the default configs
 - Fix the spike device tree
 - Don't use stdvga device
 - Remove Makefile config changes
 - Connect a network adapter to the virt device
 - Use the gpex PCIe host for virt
 - Add support for SiFive U PCIe

Alistair Francis (4):
  hw/riscv/virt: Increase the number of interrupts
  hw/riscv/virt: Adjust memory layout spacing
  hw/riscv/virt: Connect the gpex PCIe
  riscv: Enable VGA and PCIE_VGA

 default-configs/riscv32-softmmu.mak |   8 +-
 default-configs/riscv64-softmmu.mak |   8 +-
 hw/riscv/virt.c                     | 147 ++++++++++++++++++++++++++--
 include/hw/riscv/virt.h             |  15 ++-
 4 files changed, 165 insertions(+), 13 deletions(-)


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