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Re: [Qemu-riscv] [PATCH v2 00/23] Add RISC-V TCG backend support

From: Alistair Francis
Subject: Re: [Qemu-riscv] [PATCH v2 00/23] Add RISC-V TCG backend support
Date: Thu, 20 Dec 2018 09:20:05 -0800

On Wed, Dec 19, 2018 at 10:07 PM Richard Henderson
<address@hidden> wrote:
> On 12/19/18 11:16 AM, Alistair Francis wrote:
> > This patch set adds RISC-V backend support to QEMU. This is based on
> > Michael Clark's original work with extra work on top.
> >
> > This has been somewhat tested and can run other architecture softmmu
> > code. It seems that any complex OS will eventually hang, but we can
> > run the BIOS and OS startup code for a number of different operating
> > systems.
> >
> > I haven't tested linux user support at all yet. I think Michael had that
> > working reliably though and hopefully my changes haven't broken it.
> >
> > There are still some todos in the code (there are missing instructions
> > and byte swapping) but these should assert instead of generating invalid
> > code.
> Queued to tcg-next, with the extrh fix.

Thanks Richard!

> Some of those todos are no longer todos, since e.g. bswap is now optional.
> Those asserts should never fire (as a good assert should do, I suppose).
> The missing instructions are only for riscv32, which afaik is just now making
> its way to glibc.  So a chroot complete enough to build qemu is a ways away.
> I'm ok with leaving that incomplete for now.
> r~

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