Re: [Qemu-riscv] [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
b7781a7 target/riscv: Remaining rvc insn reuse 32 bit translators
1ab9d8e target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
0fa8b2e target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
c244577 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
543f794 target/riscv: Convert @cs_2 insns to share translation functions
aa10284 target/riscv: Remove decode_RV32_64G()
722467d target/riscv: Remove gen_system()
7282e3f target/riscv: Rename trans_arith to gen_arith
740da2a target/riscv: Remove manual decoding of RV32/64M insn
82b3b82 target/riscv: Remove shift and slt insn manual decoding
888303c target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
f43fc38 target/riscv: Move gen_arith_imm() decoding into trans_* functions
675475d target/riscv: Remove manual decoding from gen_store()
18e9f9c target/riscv: Remove manual decoding from gen_load()
a4b5ccf target/riscv: Remove manual decoding from gen_branch()
2bcd11b target/riscv: Remove gen_jalr()
09af5a0 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
f0cd394 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
7f0870a target/riscv: Convert quadrant 0 of RVXC insns to decodetree
0b9d6d2 target/riscv: Convert RV priv insns to decodetree
9c6e329 target/riscv: Convert RV64D insns to decodetree
e955fce target/riscv: Convert RV32D insns to decodetree
13e93c0 target/riscv: Convert RV64F insns to decodetree
12184ac target/riscv: Convert RV32F insns to decodetree
a3bcf32 target/riscv: Convert RV64A insns to decodetree
5c47e6b target/riscv: Convert RV32A insns to decodetree
b0f1dae target/riscv: Convert RVXM insns to decodetree
a58a706 target/riscv: Convert RVXI csr insns to decodetree
d47d9c8 target/riscv: Convert RVXI fence insns to decodetree
7a89aec target/riscv: Convert RVXI arithmetic insns to decodetree
a71f6e8 target/riscv: Convert RV64I load/store insns to decodetree
ca43510 target/riscv: Convert RV32I load/store insns to decodetree
e1f0ea1 target/riscv: Convert RVXI branch insns to decodetree
c7218af target/riscv: Activate decodetree and implemnt LUI & AUIPC
9c5a0c8 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 9c5a0c8e56d9 (target/riscv: Move CPURISCVState pointer to 
DisasContext)
2/35 Checking commit c7218af8df45 (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1687:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit e1f0ea1e116d (target/riscv: Convert RVXI branch insns to 
decodetree)
4/35 Checking commit ca43510d59be (target/riscv: Convert RV32I load/store insns 
to decodetree)
5/35 Checking commit a71f6e8504f8 (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 7a89aecc1174 (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
7/35 Checking commit d47d9c887001 (target/riscv: Convert RVXI fence insns to 
decodetree)
8/35 Checking commit a58a706b3359 (target/riscv: Convert RVXI csr insns to 
decodetree)
9/35 Checking commit b0f1dae534f9 (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 5c47e6b13010 (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit a3bcf32dcc89 (target/riscv: Convert RV64A insns to 
decodetree)
12/35 Checking commit 12184aca41b0 (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 397 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 13e93c0c2d8c (target/riscv: Convert RV64F insns to 
decodetree)
14/35 Checking commit e955fcea2360 (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 353 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 9c6e329affae (target/riscv: Convert RV64D insns to 
decodetree)
16/35 Checking commit 0b9d6d2b6712 (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 7f0870aece04 (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:983:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit f0cd3946bbd4 (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
19/35 Checking commit 09af5a078201 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
20/35 Checking commit 2bcd11b0c280 (target/riscv: Remove gen_jalr())
21/35 Checking commit a4b5ccf08c55 (target/riscv: Remove manual decoding from 
gen_branch())
22/35 Checking commit 18e9f9cb58b7 (target/riscv: Remove manual decoding from 
gen_load())
23/35 Checking commit 675475d8b0f7 (target/riscv: Remove manual decoding from 
gen_store())
24/35 Checking commit f43fc3824068 (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
25/35 Checking commit 888303cf5131 (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
26/35 Checking commit 82b3b828f4a3 (target/riscv: Remove shift and slt insn 
manual decoding)
27/35 Checking commit 740da2a81db5 (target/riscv: Remove manual decoding of 
RV32/64M insn)
28/35 Checking commit 7282e3f26c84 (target/riscv: Rename trans_arith to 
gen_arith)
29/35 Checking commit 722467d01ef3 (target/riscv: Remove gen_system())
30/35 Checking commit aa10284d64ce (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 543f794cbe28 (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:497:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit c24457729cb7 (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
33/35 Checking commit 0fa8b2e28f93 (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 287 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 1ab9d8e93ebe (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
35/35 Checking commit b7781a700d0d (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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