Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
1c6bdfe989 target/riscv: Remaining rvc insn reuse 32 bit translators
d8ca8fce4a target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
c43a08f0e7 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
7658d5513c target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
12beb8bb47 target/riscv: Convert @cs_2 insns to share translation functions
f2a8173304 target/riscv: Remove decode_RV32_64G()
8894e2fe73 target/riscv: Remove gen_system()
2e8f564304 target/riscv: Rename trans_arith to gen_arith
d324cc4619 target/riscv: Remove manual decoding of RV32/64M insn
8dd0068daa target/riscv: Remove shift and slt insn manual decoding
9b9283643e target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
d6590d16d7 target/riscv: Move gen_arith_imm() decoding into trans_* functions
47b407149e target/riscv: Remove manual decoding from gen_store()
e8e1df3a57 target/riscv: Remove manual decoding from gen_load()
1a7dbe9e06 target/riscv: Remove manual decoding from gen_branch()
dfc0199b2c target/riscv: Remove gen_jalr()
19a6562703 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
39bd80093d target/riscv: Convert quadrant 1 of RVXC insns to decodetree
a6d286ffb2 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
8a6d6a3134 target/riscv: Convert RV priv insns to decodetree
21a55239ca target/riscv: Convert RV64D insns to decodetree
4be6a7c28c target/riscv: Convert RV32D insns to decodetree
d78760da75 target/riscv: Convert RV64F insns to decodetree
8597684b43 target/riscv: Convert RV32F insns to decodetree
39844028ac target/riscv: Convert RV64A insns to decodetree
6991b839b1 target/riscv: Convert RV32A insns to decodetree
29a6d49351 target/riscv: Convert RVXM insns to decodetree
4fa5d7b56e target/riscv: Convert RVXI csr insns to decodetree
ea579111ef target/riscv: Convert RVXI fence insns to decodetree
3db0b3f209 target/riscv: Convert RVXI arithmetic insns to decodetree
e4fa6cdb39 target/riscv: Convert RV64I load/store insns to decodetree
26069dcf70 target/riscv: Convert RV32I load/store insns to decodetree
f70fb7c7dd target/riscv: Convert RVXI branch insns to decodetree
82f3450ac7 target/riscv: Activate decodetree and implemnt LUI & AUIPC
6fc132406d target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 6fc132406dff (target/riscv: Move CPURISCVState pointer to 
DisasContext)
2/35 Checking commit 82f3450ac738 (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit f70fb7c7ddae (target/riscv: Convert RVXI branch insns to 
decodetree)
4/35 Checking commit 26069dcf702a (target/riscv: Convert RV32I load/store insns 
to decodetree)
5/35 Checking commit e4fa6cdb3991 (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 3db0b3f2090b (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
7/35 Checking commit ea579111ef40 (target/riscv: Convert RVXI fence insns to 
decodetree)
8/35 Checking commit 4fa5d7b56e95 (target/riscv: Convert RVXI csr insns to 
decodetree)
9/35 Checking commit 29a6d4935194 (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 6991b839b1a9 (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 39844028ac4e (target/riscv: Convert RV64A insns to 
decodetree)
12/35 Checking commit 8597684b432c (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit d78760da752f (target/riscv: Convert RV64F insns to 
decodetree)
14/35 Checking commit 4be6a7c28c64 (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 21a55239cac5 (target/riscv: Convert RV64D insns to 
decodetree)
16/35 Checking commit 8a6d6a3134dd (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit a6d286ffb24c (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 39bd80093d18 (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
19/35 Checking commit 19a6562703b6 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
20/35 Checking commit dfc0199b2cc3 (target/riscv: Remove gen_jalr())
21/35 Checking commit 1a7dbe9e0633 (target/riscv: Remove manual decoding from 
gen_branch())
22/35 Checking commit e8e1df3a570e (target/riscv: Remove manual decoding from 
gen_load())
23/35 Checking commit 47b407149e90 (target/riscv: Remove manual decoding from 
gen_store())
24/35 Checking commit d6590d16d7a6 (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
25/35 Checking commit 9b9283643e0b (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
26/35 Checking commit 8dd0068daa6a (target/riscv: Remove shift and slt insn 
manual decoding)
27/35 Checking commit d324cc4619d9 (target/riscv: Remove manual decoding of 
RV32/64M insn)
28/35 Checking commit 2e8f56430485 (target/riscv: Rename trans_arith to 
gen_arith)
29/35 Checking commit 8894e2fe73ea (target/riscv: Remove gen_system())
30/35 Checking commit f2a81733046c (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 12beb8bb47f9 (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 7658d5513c89 (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
33/35 Checking commit c43a08f0e7de (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit d8ca8fce4ad7 (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
35/35 Checking commit 1c6bdfe98959 (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden