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Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to
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Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree |
Date: |
Wed, 27 Feb 2019 11:14:12 -0800 (PST) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
2bccd31307 target/riscv: Remaining rvc insn reuse 32 bit translators
0f7a90f92e target/riscv: Splice remaining compressed insn pairs for riscv32 vs
riscv64
d280cf9975 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
e07932137e target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
ecc8d2c072 target/riscv: Convert @cs_2 insns to share translation functions
0afeac566c target/riscv: Remove decode_RV32_64G()
b8d3653c5f target/riscv: Remove gen_system()
49a817f32f target/riscv: Rename trans_arith to gen_arith
c052fba9fb target/riscv: Remove manual decoding of RV32/64M insn
fc201c16cc target/riscv: Remove shift and slt insn manual decoding
6d4f8b0140 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
31176cd07a target/riscv: Move gen_arith_imm() decoding into trans_* functions
a98f088a24 target/riscv: Remove manual decoding from gen_store()
d41b2728e0 target/riscv: Remove manual decoding from gen_load()
78d9069947 target/riscv: Remove manual decoding from gen_branch()
c7c365c8dc target/riscv: Remove gen_jalr()
a4f18a22cf target/riscv: Convert quadrant 2 of RVXC insns to decodetree
ce66c130b4 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
291a35ae2b target/riscv: Convert quadrant 0 of RVXC insns to decodetree
47d163aea4 target/riscv: Convert RV priv insns to decodetree
78dd2af4fa target/riscv: Convert RV64D insns to decodetree
d2c318df64 target/riscv: Convert RV32D insns to decodetree
496076a9ce target/riscv: Convert RV64F insns to decodetree
3ac0ac0c5e target/riscv: Convert RV32F insns to decodetree
5170d58ec1 target/riscv: Convert RV64A insns to decodetree
ebdae9e69a target/riscv: Convert RV32A insns to decodetree
00740fadcb target/riscv: Convert RVXM insns to decodetree
6575067a23 target/riscv: Convert RVXI csr insns to decodetree
32b7b1f5ba target/riscv: Convert RVXI fence insns to decodetree
37bbf949f0 target/riscv: Convert RVXI arithmetic insns to decodetree
7a9c48e2f3 target/riscv: Convert RV64I load/store insns to decodetree
3f90cfa25f target/riscv: Convert RV32I load/store insns to decodetree
90d544ab68 target/riscv: Convert RVXI branch insns to decodetree
9685b5d011 target/riscv: Activate decodetree and implemnt LUI & AUIPC
=== OUTPUT BEGIN ===
1/34 Checking commit 9685b5d011e8 (target/riscv: Activate decodetree and
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34:
new file mode 100644
ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1884:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);
total: 1 errors, 1 warnings, 125 lines checked
Patch 1/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
2/34 Checking commit 90d544ab6835 (target/riscv: Convert RVXI branch insns to
decodetree)
3/34 Checking commit 3f90cfa25f76 (target/riscv: Convert RV32I load/store insns
to decodetree)
4/34 Checking commit 7a9c48e2f3be (target/riscv: Convert RV64I load/store insns
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39:
new file mode 100644
total: 0 errors, 1 warnings, 76 lines checked
Patch 4/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/34 Checking commit 37bbf949f054 (target/riscv: Convert RVXI arithmetic insns
to decodetree)
6/34 Checking commit 32b7b1f5ba5c (target/riscv: Convert RVXI fence insns to
decodetree)
7/34 Checking commit 6575067a2365 (target/riscv: Convert RVXI csr insns to
decodetree)
8/34 Checking commit 00740fadcb65 (target/riscv: Convert RVXM insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 169 lines checked
Patch 8/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/34 Checking commit ebdae9e69abd (target/riscv: Convert RV32A insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54:
new file mode 100644
total: 0 errors, 1 warnings, 199 lines checked
Patch 9/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/34 Checking commit 5170d58ec187 (target/riscv: Convert RV64A insns to
decodetree)
11/34 Checking commit 3ac0ac0c5eab (target/riscv: Convert RV32F insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 442 lines checked
Patch 11/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/34 Checking commit 496076a9ceb5 (target/riscv: Convert RV64F insns to
decodetree)
13/34 Checking commit d2c318df64d7 (target/riscv: Convert RV32D insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51:
new file mode 100644
total: 0 errors, 1 warnings, 398 lines checked
Patch 13/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/34 Checking commit 78dd2af4fa05 (target/riscv: Convert RV64D insns to
decodetree)
15/34 Checking commit 47d163aea496 (target/riscv: Convert RV priv insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41:
new file mode 100644
total: 0 errors, 1 warnings, 214 lines checked
Patch 15/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
16/34 Checking commit 291a35ae2b9c (target/riscv: Convert quadrant 0 of RVXC
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31:
new file mode 100644
ERROR: externs should be avoided in .c files
#251: FILE: target/riscv/translate.c:1072:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 231 lines checked
Patch 16/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/34 Checking commit ce66c130b495 (target/riscv: Convert quadrant 1 of RVXC
insns to decodetree)
18/34 Checking commit a4f18a22cf1a (target/riscv: Convert quadrant 2 of RVXC
insns to decodetree)
19/34 Checking commit c7c365c8dc0c (target/riscv: Remove gen_jalr())
20/34 Checking commit 78d90699477b (target/riscv: Remove manual decoding from
gen_branch())
21/34 Checking commit d41b2728e07f (target/riscv: Remove manual decoding from
gen_load())
22/34 Checking commit a98f088a24fd (target/riscv: Remove manual decoding from
gen_store())
23/34 Checking commit 31176cd07a8c (target/riscv: Move gen_arith_imm() decoding
into trans_* functions)
24/34 Checking commit 6d4f8b01403b (target/riscv: make ADD/SUB/OR/XOR/AND insn
use arg lists)
25/34 Checking commit fc201c16ccee (target/riscv: Remove shift and slt insn
manual decoding)
26/34 Checking commit c052fba9fb87 (target/riscv: Remove manual decoding of
RV32/64M insn)
27/34 Checking commit 49a817f32f33 (target/riscv: Rename trans_arith to
gen_arith)
28/34 Checking commit b8d3653c5f0e (target/riscv: Remove gen_system())
29/34 Checking commit 0afeac566c6f (target/riscv: Remove decode_RV32_64G())
30/34 Checking commit ecc8d2c072f5 (target/riscv: Convert @cs_2 insns to share
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42:
new file mode 100644
ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:548:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 164 lines checked
Patch 30/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
31/34 Checking commit e07932137eca (target/riscv: Convert @cl_d, @cl_w, @cs_d,
@cs_w insns)
32/34 Checking commit d280cf997594 (target/riscv: Splice fsw_sd and flw_ld for
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28:
new file mode 100644
total: 0 errors, 1 warnings, 309 lines checked
Patch 32/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
33/34 Checking commit 0f7a90f92ef0 (target/riscv: Splice remaining compressed
insn pairs for riscv32 vs riscv64)
34/34 Checking commit 2bccd31307cb (target/riscv: Remaining rvc insn reuse 32
bit translators)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, (continued)
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, Alistair Francis, 2019/02/22
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
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- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
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- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree,
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- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27