Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
e09a605c06 target/riscv: Remaining rvc insn reuse 32 bit translators
7cd2a8a1dd target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
91f37fbc67 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
1b6aa72048 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
3610605612 target/riscv: Convert @cs_2 insns to share translation functions
a52fdac789 target/riscv: Remove decode_RV32_64G()
52777411d1 target/riscv: Remove gen_system()
68104aff5d target/riscv: Rename trans_arith to gen_arith
44ee020c00 target/riscv: Remove manual decoding of RV32/64M insn
f5b0464a03 target/riscv: Remove shift and slt insn manual decoding
f409f5fd91 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
5d8472fc87 target/riscv: Move gen_arith_imm() decoding into trans_* functions
be9b612598 target/riscv: Remove manual decoding from gen_store()
f748f6cf8b target/riscv: Remove manual decoding from gen_load()
dc8a556b68 target/riscv: Remove manual decoding from gen_branch()
0656f71d82 target/riscv: Remove gen_jalr()
8cf5b85c70 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
85cff29d3e target/riscv: Convert quadrant 1 of RVXC insns to decodetree
7f465ab803 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
e55d0e1783 target/riscv: Convert RV priv insns to decodetree
b961f21457 target/riscv: Convert RV64D insns to decodetree
1fcf3def16 target/riscv: Convert RV32D insns to decodetree
45566cba73 target/riscv: Convert RV64F insns to decodetree
6cb690660a target/riscv: Convert RV32F insns to decodetree
3143ae903b target/riscv: Convert RV64A insns to decodetree
bc3ec6ac00 target/riscv: Convert RV32A insns to decodetree
7d299a6f18 target/riscv: Convert RVXM insns to decodetree
2169c49711 target/riscv: Convert RVXI csr insns to decodetree
c3bed35df2 target/riscv: Convert RVXI fence insns to decodetree
3a15d2fe53 target/riscv: Convert RVXI arithmetic insns to decodetree
62a286aaf5 target/riscv: Convert RV64I load/store insns to decodetree
04bd913382 target/riscv: Convert RV32I load/store insns to decodetree
8a59c3a056 target/riscv: Convert RVXI branch insns to decodetree
eae77e5898 target/riscv: Activate decodetree and implemnt LUI & AUIPC

=== OUTPUT BEGIN ===
1/34 Checking commit eae77e589836 (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1884:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 1/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/34 Checking commit 8a59c3a056c5 (target/riscv: Convert RVXI branch insns to 
decodetree)
3/34 Checking commit 04bd91338248 (target/riscv: Convert RV32I load/store insns 
to decodetree)
4/34 Checking commit 62a286aaf569 (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 4/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/34 Checking commit 3a15d2fe5338 (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
6/34 Checking commit c3bed35df276 (target/riscv: Convert RVXI fence insns to 
decodetree)
7/34 Checking commit 2169c4971112 (target/riscv: Convert RVXI csr insns to 
decodetree)
8/34 Checking commit 7d299a6f18be (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 169 lines checked

Patch 8/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/34 Checking commit bc3ec6ac00ad (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 199 lines checked

Patch 9/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/34 Checking commit 3143ae903be2 (target/riscv: Convert RV64A insns to 
decodetree)
11/34 Checking commit 6cb690660a2a (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 442 lines checked

Patch 11/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/34 Checking commit 45566cba7371 (target/riscv: Convert RV64F insns to 
decodetree)
13/34 Checking commit 1fcf3def16a2 (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 398 lines checked

Patch 13/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/34 Checking commit b961f2145701 (target/riscv: Convert RV64D insns to 
decodetree)
15/34 Checking commit e55d0e178370 (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 15/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
16/34 Checking commit 7f465ab80399 (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#251: FILE: target/riscv/translate.c:1072:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 231 lines checked

Patch 16/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

17/34 Checking commit 85cff29d3eb3 (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
18/34 Checking commit 8cf5b85c70d5 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
19/34 Checking commit 0656f71d82a1 (target/riscv: Remove gen_jalr())
20/34 Checking commit dc8a556b68fc (target/riscv: Remove manual decoding from 
gen_branch())
21/34 Checking commit f748f6cf8bf2 (target/riscv: Remove manual decoding from 
gen_load())
22/34 Checking commit be9b612598bf (target/riscv: Remove manual decoding from 
gen_store())
23/34 Checking commit 5d8472fc87ed (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
24/34 Checking commit f409f5fd91e1 (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
25/34 Checking commit f5b0464a0391 (target/riscv: Remove shift and slt insn 
manual decoding)
26/34 Checking commit 44ee020c00a3 (target/riscv: Remove manual decoding of 
RV32/64M insn)
27/34 Checking commit 68104aff5d0a (target/riscv: Rename trans_arith to 
gen_arith)
28/34 Checking commit 52777411d1ce (target/riscv: Remove gen_system())
29/34 Checking commit a52fdac78974 (target/riscv: Remove decode_RV32_64G())
30/34 Checking commit 36106056126a (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:548:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 30/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

31/34 Checking commit 1b6aa72048aa (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
32/34 Checking commit 91f37fbc67c4 (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 32/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
33/34 Checking commit 7cd2a8a1dd71 (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
34/34 Checking commit e09a605c063f (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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