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Re: [Qemu-riscv] [PATCH] hardfloat: fix float32/64 fused multiply-add
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From: |
Emilio G. Cota |
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Subject: |
Re: [Qemu-riscv] [PATCH] hardfloat: fix float32/64 fused multiply-add |
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Date: |
Fri, 22 Mar 2019 16:28:24 -0400 |
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User-agent: |
Mutt/1.9.4 (2018-02-28) |
On Sat, Mar 23, 2019 at 01:39:26 +0800, Kito Cheng wrote:
> hardfloat fused multiply-add might fallback to softfloat mode in some
> situation, but it might already changed the value of input operands,
> so we must restore those value before fallback.
>
> This bug is catched by running gcc testsuite on RISC-V qemu.
>
> Signed-off-by: Kito Cheng <address@hidden>
Good catch!
I'll send a v2 shortly with some small changes.
Thanks,
Emilio