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Re: [Qemu-riscv] [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-rang

From: Bin Meng
Subject: Re: [Qemu-riscv] [Qemu-devel] [PATCH] riscv: virt: Correct pci "bus-range" encoding
Date: Thu, 30 May 2019 11:36:46 +0800

Hi Alistair,

On Thu, May 30, 2019 at 11:14 AM Alistair Francis <address@hidden> wrote:
> On Wed, May 29, 2019 at 1:52 AM Bin Meng <address@hidden> wrote:
> >
> > The largest pci bus number should be calculated from ECAM size,
> > instead of its base address.
> >
> > Signed-off-by: Bin Meng <address@hidden>
> This seems ok, can you maybe explain what this fixes?

The logic is wrong, as the commit message said. With current wrong
logic, the largest pci bus number encoded in "bus-ranges" property was
wrongly set to 0x2ff in this case. Per pci spec, the bus number should
not exceed 0xff.


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