qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-riscv] [RFC v1 5/5] hw/riscv: Load OpenSBI as the default firmware


From: Alistair Francis
Subject: [Qemu-riscv] [RFC v1 5/5] hw/riscv: Load OpenSBI as the default firmware
Date: Tue, 18 Jun 2019 17:38:58 -0700

If the user hasn't specified a firmware to load (with -bios) or
specified no bios (with -bios none) then load OpenSBI by default. This
allows users to boot a RISC-V kernel with just -kernel.

Signed-off-by: Alistair Francis <address@hidden>
---
 hw/riscv/boot.c         | 28 ++++++++++++++++++++++++++++
 hw/riscv/sifive_u.c     |  4 +---
 hw/riscv/virt.c         |  4 +---
 include/hw/riscv/boot.h |  1 +
 4 files changed, 31 insertions(+), 6 deletions(-)

diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 7f68035a3f..5f021591ed 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -18,6 +18,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu-common.h"
 #include "qemu/units.h"
 #include "qemu/error-report.h"
 #include "exec/cpu-defs.h"
@@ -32,6 +33,12 @@
 # define KERNEL_BOOT_ADDRESS 0x80200000
 #endif
 
+#if defined(TARGET_RISCV32)
+# define BIOS_FILENAME "opensbi-riscv32-fw_jump.elf"
+#else
+# define BIOS_FILENAME "opensbi-riscv64-fw_jump.elf"
+#endif
+
 static uint64_t kernel_translate(void *opaque, uint64_t addr)
 {
     MachineState *machine = opaque;
@@ -47,6 +54,27 @@ static uint64_t kernel_translate(void *opaque, uint64_t addr)
     }
 }
 
+void riscv_find_and_load_firmware(MachineState *machine)
+{
+    char *firmware_filename;
+
+    if (!machine->firmware) {
+        /* The user didn't specify a firmware, default to OpenSBI */
+        firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BIOS_FILENAME);
+    } else {
+        firmware_filename = machine->firmware;
+    }
+
+    if (strcmp(firmware_filename, "none")) {
+        /* If not "none" load the firmware */
+        riscv_load_firmware(firmware_filename);
+    }
+
+    if (!machine->firmware) {
+        g_free(firmware_filename);
+    }
+}
+
 target_ulong riscv_load_firmware(const char *firmware_filename)
 {
     uint64_t firmware_entry, firmware_start, firmware_end;
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 03a6c64d04..77666d0f4d 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -266,9 +266,7 @@ static void riscv_sifive_u_init(MachineState *machine)
     /* create device tree */
     create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
 
-    if (machine->firmware) {
-        riscv_load_firmware(machine->firmware);
-    }
+    riscv_find_and_load_firmware(machine);
 
     if (machine->kernel_filename) {
         riscv_load_kernel(machine, machine->kernel_filename);
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d3670b5a7c..2a7e850666 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -380,9 +380,7 @@ static void riscv_virt_board_init(MachineState *machine)
     memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base,
                                 mask_rom);
 
-    if (machine->firmware) {
-        riscv_load_firmware(machine->firmware);
-    }
+    riscv_find_and_load_firmware(machine);
 
     if (machine->kernel_filename) {
         uint64_t kernel_entry = riscv_load_kernel(machine,
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
index 6f586939c7..df2e2480e6 100644
--- a/include/hw/riscv/boot.h
+++ b/include/hw/riscv/boot.h
@@ -20,6 +20,7 @@
 #ifndef RISCV_BOOT_H
 #define RISCV_BOOT_H
 
+void riscv_find_and_load_firmware(MachineState *machine);
 target_ulong riscv_load_firmware(const char *firmware_filename);
 target_ulong riscv_load_kernel(MachineState *machine,
                                const char *kernel_filename);
-- 
2.22.0




reply via email to

[Prev in Thread] Current Thread [Next in Thread]