[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-riscv] [PATCH v8 01/32] riscv: hw: Remove duplicated "hw/hw.h" inc
|
From: |
Bin Meng |
|
Subject: |
[Qemu-riscv] [PATCH v8 01/32] riscv: hw: Remove duplicated "hw/hw.h" inclusion |
|
Date: |
Fri, 6 Sep 2019 09:19:48 -0700 |
Commit a27bd6c779ba ("Include hw/qdev-properties.h less") wrongly
added "hw/hw.h" to sifive_prci.c and sifive_test.c.
Another inclusion of "hw/hw.h" was later added via
commit 650d103d3ea9 ("Include hw/hw.h exactly where needed"), that
resulted in duplicated inclusion of "hw/hw.h".
Fixes: a27bd6c779ba ("Include hw/qdev-properties.h less")
Signed-off-by: Bin Meng <address@hidden>
---
Changes in v8:
- newly included in v8 to ease patch inter dependencies
hw/riscv/sifive_prci.c | 1 -
hw/riscv/sifive_test.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/hw/riscv/sifive_prci.c b/hw/riscv/sifive_prci.c
index 9837b61..562bc3d 100644
--- a/hw/riscv/sifive_prci.c
+++ b/hw/riscv/sifive_prci.c
@@ -19,7 +19,6 @@
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
#include "hw/sysbus.h"
#include "qemu/module.h"
#include "target/riscv/cpu.h"
diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c
index afbb3aa..3a14f9f 100644
--- a/hw/riscv/sifive_test.c
+++ b/hw/riscv/sifive_test.c
@@ -19,7 +19,6 @@
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
#include "hw/sysbus.h"
#include "qemu/module.h"
#include "target/riscv/cpu.h"
--
2.7.4
- [Qemu-riscv] [PATCH v8 00/32] riscv: sifive_u: Improve the emulation fidelity of sifive_u machine, Bin Meng, 2019/09/06
- [Qemu-riscv] [PATCH v8 01/32] riscv: hw: Remove duplicated "hw/hw.h" inclusion,
Bin Meng <=
- [Qemu-riscv] [PATCH v8 02/32] riscv: sifive_test: Add reset functionality, Bin Meng, 2019/09/06
- [Qemu-riscv] [PATCH v8 05/32] riscv: hw: Remove not needed PLIC properties in device tree, Bin Meng, 2019/09/06
- [Qemu-riscv] [PATCH v8 03/32] riscv: hw: Remove superfluous "linux, phandle" property, Bin Meng, 2019/09/06
- [Qemu-riscv] [PATCH v8 04/32] riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell, Bin Meng, 2019/09/06
- [Qemu-riscv] [PATCH v8 08/32] riscv: hw: Remove the unnecessary include of target/riscv/cpu.h, Bin Meng, 2019/09/06
- [Qemu-riscv] [PATCH v8 12/32] riscv: sifive_e: prci: Fix a typo of hfxosccfg register programming, Bin Meng, 2019/09/06
- [Qemu-riscv] [PATCH v8 07/32] riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead, Bin Meng, 2019/09/06
- [Qemu-riscv] [PATCH v8 09/32] riscv: roms: Remove executable attribute of opensbi images, Bin Meng, 2019/09/06