[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-riscv] [PULL 21/47] riscv: roms: Remove executable attribute of op
|
From: |
Palmer Dabbelt |
|
Subject: |
[Qemu-riscv] [PULL 21/47] riscv: roms: Remove executable attribute of opensbi images |
|
Date: |
Tue, 10 Sep 2019 12:04:47 -0700 |
From: Bin Meng <address@hidden>
Like other binary files, the executable attribute of opensbi images
should not be set.
Signed-off-by: Bin Meng <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>
---
pc-bios/opensbi-riscv32-virt-fw_jump.bin | Bin
pc-bios/opensbi-riscv64-sifive_u-fw_jump.bin | Bin
pc-bios/opensbi-riscv64-virt-fw_jump.bin | Bin
3 files changed, 0 insertions(+), 0 deletions(-)
mode change 100755 => 100644 pc-bios/opensbi-riscv32-virt-fw_jump.bin
mode change 100755 => 100644 pc-bios/opensbi-riscv64-sifive_u-fw_jump.bin
mode change 100755 => 100644 pc-bios/opensbi-riscv64-virt-fw_jump.bin
diff --git a/pc-bios/opensbi-riscv32-virt-fw_jump.bin
b/pc-bios/opensbi-riscv32-virt-fw_jump.bin
old mode 100755
new mode 100644
diff --git a/pc-bios/opensbi-riscv64-sifive_u-fw_jump.bin
b/pc-bios/opensbi-riscv64-sifive_u-fw_jump.bin
old mode 100755
new mode 100644
diff --git a/pc-bios/opensbi-riscv64-virt-fw_jump.bin
b/pc-bios/opensbi-riscv64-virt-fw_jump.bin
old mode 100755
new mode 100644
--
2.21.0
- [Qemu-riscv] [PULL 13/47] riscv: sifive_test: Add reset functionality, (continued)
- [Qemu-riscv] [PULL 13/47] riscv: sifive_test: Add reset functionality, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 12/47] riscv: hmp: Add a command to show virtual memory mappings, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 14/47] riscv: hw: Remove duplicated "hw/hw.h" inclusion, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 15/47] riscv: hw: Remove superfluous "linux, phandle" property, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 16/47] riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 17/47] riscv: hw: Remove not needed PLIC properties in device tree, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 18/47] riscv: hw: Change create_fdt() to return void, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 19/47] riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 20/47] riscv: hw: Remove the unnecessary include of target/riscv/cpu.h, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 22/47] riscv: sifive_u: Remove the unnecessary include of prci header, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 21/47] riscv: roms: Remove executable attribute of opensbi images,
Palmer Dabbelt <=
- [Qemu-riscv] [PULL 24/47] riscv: sifive_e: prci: Fix a typo of hfxosccfg register programming, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 23/47] riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h}, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 25/47] riscv: sifive_e: prci: Update the PRCI register block size, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 27/47] riscv: Add a sifive_cpu.h to include both E and U cpu type defines, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 26/47] riscv: sifive_e: Drop sifive_mmio_emulate(), Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 29/47] riscv: hart: Add a "hartid-base" property to RISC-V hart array, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 28/47] riscv: hart: Extract hart realize to a separate routine, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 30/47] riscv: sifive_u: Set the minimum number of cpus to 2, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 31/47] riscv: sifive_u: Update hart configuration to reflect the real FU540 SoC, Palmer Dabbelt, 2019/09/11
- [Qemu-riscv] [PULL 32/47] riscv: sifive_u: Update PLIC hart topology configuration string, Palmer Dabbelt, 2019/09/11