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[PULL 4/5] target/riscv: fsd/fsw doesn't dirty FP state
From: |
Palmer Dabbelt |
Subject: |
[PULL 4/5] target/riscv: fsd/fsw doesn't dirty FP state |
Date: |
Tue, 21 Jan 2020 14:57:01 -0800 |
From: ShihPo Hung <address@hidden>
Signed-off-by: ShihPo Hung <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>
---
target/riscv/insn_trans/trans_rvd.inc.c | 1 -
target/riscv/insn_trans/trans_rvf.inc.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvd.inc.c
b/target/riscv/insn_trans/trans_rvd.inc.c
index 393fa0248c..ea1044f13b 100644
--- a/target/riscv/insn_trans/trans_rvd.inc.c
+++ b/target/riscv/insn_trans/trans_rvd.inc.c
@@ -43,7 +43,6 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a)
tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEQ);
- mark_fs_dirty(ctx);
tcg_temp_free(t0);
return true;
}
diff --git a/target/riscv/insn_trans/trans_rvf.inc.c
b/target/riscv/insn_trans/trans_rvf.inc.c
index 172dbfa919..e23cd639a6 100644
--- a/target/riscv/insn_trans/trans_rvf.inc.c
+++ b/target/riscv/insn_trans/trans_rvf.inc.c
@@ -52,7 +52,6 @@ static bool trans_fsw(DisasContext *ctx, arg_fsw *a)
tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEUL);
tcg_temp_free(t0);
- mark_fs_dirty(ctx);
return true;
}
--
2.25.0.341.g760bfbb309-goog
- [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 1, Palmer Dabbelt, 2020/01/21
- [PULL 1/5] riscv/sifive_u: fix a memory leak in soc_realize(), Palmer Dabbelt, 2020/01/21
- [PULL 3/5] target/riscv: Fix tb->flags FS status, Palmer Dabbelt, 2020/01/21
- [PULL 2/5] riscv: Set xPIE to 1 after xRET, Palmer Dabbelt, 2020/01/21
- [PULL 4/5] target/riscv: fsd/fsw doesn't dirty FP state,
Palmer Dabbelt <=
- [PULL 5/5] target/riscv: update mstatus.SD when FS is set dirty, Palmer Dabbelt, 2020/01/21
- Re: [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 1, Peter Maydell, 2020/01/23
- Re: [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 1, Palmer Dabbelt, 2020/01/23
- Re: [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 1, Peter Maydell, 2020/01/24