Re: [PATCH] disas/riscv: Fix incorrect disassembly for `imm20` operand.

[Alistair Francis]

On Tue, 2020-07-07 at 18:09 +0800, lazyparser@gmail.com wrote:
> From: Wei Wu <lazyparser@gmail.com>
> 
> `imm20` operand type is used in LUI/AUIPC and other instructions.
> The value should not be left shifted 12bits for disassembly output.
> 
> Signed-off-by: Wei Wu <lazyparser@gmail.com>

Hello,

Thanks for the patch.

Can you please send it again and make sure you CC the QEMU mailing
list? https://lists.nongnu.org/mailman/listinfo/qemu-devel

Alistair

> ---
>  disas/riscv.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/disas/riscv.c b/disas/riscv.c
> index 278d9be924..a2b6472bd8 100644
> --- a/disas/riscv.c
> +++ b/disas/riscv.c
> @@ -2083,7 +2083,7 @@ static int32_t operand_imm12(rv_inst inst)
>  
>  static int32_t operand_imm20(rv_inst inst)
>  {
> -    return (((int64_t)inst << 32) >> 44) << 12;
> +    return ((int64_t)inst << 32) >> 44;
>  }
>  
>  static int32_t operand_jimm20(rv_inst inst)