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Re: [PATCH 3/3] target/riscv: Update MTINST/HTINST CSR in riscv_cpu_do_i

From: Richard Henderson
Subject: Re: [PATCH 3/3] target/riscv: Update MTINST/HTINST CSR in riscv_cpu_do_interrupt()
Date: Thu, 13 Aug 2020 08:52:43 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 8/12/20 4:16 PM, Alistair Francis wrote:
> I don't like that we have to manually decode the instructions. As it's
> only a handful it's not the end of the world, but it seems like
> duplication that could grow. Could we not use decode_insn16() instead?
> That way we can share the well tested TCG decoder.

Certainly.  Compare how the decoder can be re-purposed for disassembly -- e.g.

Perhaps something like

typedef uint32_t DisasContext;

#include "decode_insn16.inc.c"

 * This function is supposed to be called for an instruction
 * that has already executed, and thus is known to be valid.
 * That said, return 0 for an invalid instruction.
uint32_t riscv_expand_rvc_to_rvi(uint16_t insn16)
    uint32_t insn32 = 0; /* illegal instruction */
    decode_insn16(&insn32, insn16);
    return insn32;

static bool expand_i(DisasContext *ctx, arg_immi *a,
                     uint32_t insn32)
    insn32 = SET_RD(insn32, a->rd);
    insn32 = SET_RS1(insn32, a->rs1);
    insn32 = SET_I_IMM(insn32, a->imm);
    *ctx = insn32;
    return true;

static bool trans_addi(DisasContext *ctx, arg_immi *a)
    return expand_i(ctx, a, OPC_RISC_ADDI);

etc.  All placed in a new file, so that the myriad symbols don't conflict with
anything else.


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