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Re: [PATCH V2 1/5] target/riscv: Add basic vmstate description of CPU
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH V2 1/5] target/riscv: Add basic vmstate description of CPU |
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Date: |
Sat, 10 Oct 2020 08:23:04 -0500 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 10/10/20 3:06 AM, Yifei Jiang wrote:
> +++ b/target/riscv/cpu.h
> @@ -311,6 +311,10 @@ extern const char * const riscv_fpr_regnames[];
> extern const char * const riscv_excp_names[];
> extern const char * const riscv_intr_names[];
>
> +#ifndef CONFIG_USER_ONLY
> +extern const VMStateDescription vmstate_riscv_cpu;
> +#endif
> +
This is not part of the public interface to RISCVCPU, so it should go in
internals.h.
Not that there aren't other things in cpu.h that don't belong. No target has
been perfect in differentiating what's interface and what's implementation.
> +
> +#ifdef TARGET_RISCV32
> + VMSTATE_UINTTL(env.mstatush, RISCVCPU),
> +#endif
Would this be a good time to expand mstatus to uint64_t instead of target_ulong
so that it can be saved as one unit and reduce some ifdefs in the code base?
Similarly with some of the other status registers that are two halved for
riscv32.
r~
[PATCH V2 5/5] target/riscv: Add sifive_plic vmstate, Yifei Jiang, 2020/10/10
[PATCH V2 4/5] target/riscv: Add V extension state description, Yifei Jiang, 2020/10/10
[PATCH V2 3/5] target/riscv: Add H extension state description, Yifei Jiang, 2020/10/10
[PATCH V2 2/5] target/riscv: Add PMP state description, Yifei Jiang, 2020/10/10