Re: [PATCH v7 6/6] [RISCV_PM] Allow experimental J-ext to be turned on

[Alistair Francis]

On Sun, Jan 10, 2021 at 11:00 AM Alexey Baturo <baturo.alexey@gmail.com> wrote:
>
> Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 19398977d3..234401c3c6 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -499,6 +499,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error 
> **errp)
>          }
>          if (cpu->cfg.ext_j) {
>              env->mmte |= PM_EXT_INITIAL;
> +            target_misa |= RVJ;
>          }
>          if (cpu->cfg.ext_v) {
>              target_misa |= RVV;
> @@ -571,6 +572,7 @@ static Property riscv_cpu_properties[] = {
>      DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
>      /* This is experimental so mark with 'x-' */
>      DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false),
> +    DEFINE_PROP_BOOL("x-j", RISCVCPU, cfg.ext_j, false),
>      DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false),
>      DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true),
>      DEFINE_PROP_BOOL("Zifencei", RISCVCPU, cfg.ext_ifencei, true),
> --
> 2.20.1
>
>