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Re: [PATCH] target/riscv: fix wfi exception behavior

From: Jose Martins
Subject: Re: [PATCH] target/riscv: fix wfi exception behavior
Date: Fri, 16 Apr 2021 12:34:37 +0100

> > -    if ((env->priv == PRV_S &&
> > -        get_field(env->mstatus, MSTATUS_TW)) ||
> > -        riscv_cpu_virt_enabled(env)) {
> > +    if ((!riscv_cpu_virt_enabled(env) && env->priv == PRV_U) ||
> > +        (env->priv == PRV_S && get_field(env->mstatus, MSTATUS_TW))) {
> Shouldn't we check here that we aren't virtualised?

In section 5.4, the spec states that mstatus.tw has effect regardless
of virtualization mode: "The TW field affects execution in all modes
except M-mode.". I interpret "all modes" as being all supervisor modes
since section states that "When S-mode is implemented, then
executing WFI in U-mode causes an illegal instruction exception" and
later chapter 5 says that a virtual instruction exception should be
generated when "in VU-mode, attempts to execute WFI (...)" regardless
of the state of any status bit. Plus, it should be an illegal
instruction exception and not a virtual instruction exception even in
VS-mode when mstatus.tw = 1 because the spec also states only "When
VTW=1 *(and assuming mstatus.TW=0)*, an attempt in VS-mode to execute
WFI raises a virtual instruction exception".

But just now I realized the patch is assuming S-mode is present and
not taking into account M/U only harts. If this is the case TW should
affect U-mode WFIs. I will fix this and submit a new version of the


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