Re: [PATCH 10/17] target/riscv: Use gpr_{src,dst} for RVA

[Alistair Francis]

On Fri, Jul 9, 2021 at 2:39 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/insn_trans/trans_rva.c.inc | 42 +++++++++----------------
>  1 file changed, 14 insertions(+), 28 deletions(-)
>
> diff --git a/target/riscv/insn_trans/trans_rva.c.inc 
> b/target/riscv/insn_trans/trans_rva.c.inc
> index ab2ec4f0a5..5bb5bbd09c 100644
> --- a/target/riscv/insn_trans/trans_rva.c.inc
> +++ b/target/riscv/insn_trans/trans_rva.c.inc
> @@ -18,11 +18,11 @@
>   * this program.  If not, see <http://www.gnu.org/licenses/>.
>   */
>
> -static inline bool gen_lr(DisasContext *ctx, arg_atomic *a, MemOp mop)
> +static bool gen_lr(DisasContext *ctx, arg_atomic *a, MemOp mop)
>  {
> -    TCGv src1 = tcg_temp_new();
> +    TCGv src1 = gpr_src(ctx, a->rs1);
> +
>      /* Put addr in load_res, data in load_val.  */
> -    gen_get_gpr(src1, a->rs1);
>      if (a->rl) {
>          tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL);
>      }
> @@ -33,30 +33,26 @@ static inline bool gen_lr(DisasContext *ctx, arg_atomic 
> *a, MemOp mop)
>      tcg_gen_mov_tl(load_res, src1);
>      gen_set_gpr(a->rd, load_val);
>
> -    tcg_temp_free(src1);
>      return true;
>  }
>
> -static inline bool gen_sc(DisasContext *ctx, arg_atomic *a, MemOp mop)
> +static bool gen_sc(DisasContext *ctx, arg_atomic *a, MemOp mop)
>  {
> -    TCGv src1 = tcg_temp_new();
> -    TCGv src2 = tcg_temp_new();
> -    TCGv dat = tcg_temp_new();
> +    TCGv dest = gpr_dst(ctx, a->rd);
> +    TCGv src1 = gpr_src(ctx, a->rs1);
> +    TCGv src2 = gpr_src(ctx, a->rs2);
>      TCGLabel *l1 = gen_new_label();
>      TCGLabel *l2 = gen_new_label();
>
> -    gen_get_gpr(src1, a->rs1);
>      tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1);
>
> -    gen_get_gpr(src2, a->rs2);
>      /*
>       * Note that the TCG atomic primitives are SC,
>       * so we can ignore AQ/RL along this path.
>       */
> -    tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2,
> +    tcg_gen_atomic_cmpxchg_tl(dest, load_res, load_val, src2,
>                                ctx->mem_idx, mop);
> -    tcg_gen_setcond_tl(TCG_COND_NE, dat, src1, load_val);
> -    gen_set_gpr(a->rd, dat);
> +    tcg_gen_setcond_tl(TCG_COND_NE, dest, dest, load_val);
>      tcg_gen_br(l2);
>
>      gen_set_label(l1);
> @@ -65,8 +61,7 @@ static inline bool gen_sc(DisasContext *ctx, arg_atomic *a, 
> MemOp mop)
>       * provide the memory barrier implied by AQ/RL.
>       */
>      tcg_gen_mb(TCG_MO_ALL + a->aq * TCG_BAR_LDAQ + a->rl * TCG_BAR_STRL);
> -    tcg_gen_movi_tl(dat, 1);
> -    gen_set_gpr(a->rd, dat);
> +    tcg_gen_movi_tl(dest, 1);
>
>      gen_set_label(l2);
>      /*
> @@ -75,9 +70,6 @@ static inline bool gen_sc(DisasContext *ctx, arg_atomic *a, 
> MemOp mop)
>       */
>      tcg_gen_movi_tl(load_res, -1);
>
> -    tcg_temp_free(dat);
> -    tcg_temp_free(src1);
> -    tcg_temp_free(src2);
>      return true;
>  }
>
> @@ -85,17 +77,11 @@ static bool gen_amo(DisasContext *ctx, arg_atomic *a,
>                      void(*func)(TCGv, TCGv, TCGv, TCGArg, MemOp),
>                      MemOp mop)
>  {
> -    TCGv src1 = tcg_temp_new();
> -    TCGv src2 = tcg_temp_new();
> +    TCGv dest = gpr_dst(ctx, a->rd);
> +    TCGv src1 = gpr_src(ctx, a->rs1);
> +    TCGv src2 = gpr_src(ctx, a->rs2);
>
> -    gen_get_gpr(src1, a->rs1);
> -    gen_get_gpr(src2, a->rs2);
> -
> -    (*func)(src2, src1, src2, ctx->mem_idx, mop);
> -
> -    gen_set_gpr(a->rd, src2);
> -    tcg_temp_free(src1);
> -    tcg_temp_free(src2);
> +    (*func)(dest, src1, src2, ctx->mem_idx, mop);
>      return true;
>  }
>
> --
> 2.25.1
>
>