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Re: [RFC PATCH v4 3/4] Adding Andes AX25 and A25 CPU model

From: 蔡傳資
Subject: Re: [RFC PATCH v4 3/4] Adding Andes AX25 and A25 CPU model
Date: Fri, 6 Aug 2021 06:11:59 +0000

Hi Bin and Alistair,

>> Adding Andes AX25 and A25 CPU model into cpu.h and cpu.c without

> The latest RISC-V core from Andes is AX45 and A45. Should we just
> support the latest one?

Maybe we can have them all ?
AX25 and A25 is still in production, and we still have new clients using these CPU models.

>> +static void ax25_cpu_init(Object *obj)
>nits: for name consistency, should be rv64_andes_ax25_cpu_init()

Will do.

>> +static void a25_cpu_init(Object *obj)
>nits: rv32_andes_a25_cpu_init()

Will do.

> +{
> +    CPURISCVState *env = &RISCV_CPU(obj)->env;
> +    set_misa(env, RV32 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
> +    set_priv_version(env, PRIV_VERSION_1_10_0);
> +}
>  #endif

> Regards,
> Bin

My sincere regards,

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