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Re: [PATCH] tcg/riscv: Fix potential bug in clobbered call register set

From: Richard Henderson
Subject: Re: [PATCH] tcg/riscv: Fix potential bug in clobbered call register set
Date: Sun, 26 Sep 2021 19:06:29 -0400
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0

On 9/26/21 5:39 PM, Philippe Mathieu-Daudé wrote:
The tcg_target_call_clobber_regs variable is of type TCGRegSet,
which is unsigned and might be 64-bit wide. By initializing it
as unsigned type, only 32-bit are set. Currently the RISCV TCG
backend only uses 32 registers, so this is not a problem.
However if more register were to be implemented (such vectors)
then it would become problematic. Since we are better safe than
sorry, properly initialize the value as 64-bit.

Fixes: 7a5549f2aea ("tcg/riscv: Add the target init code")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
  tcg/riscv/tcg-target.c.inc | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index dc8d8f1de23..5bd95633b0d 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -1734,7 +1734,7 @@ static void tcg_target_init(TCGContext *s)
          tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff;
- tcg_target_call_clobber_regs = -1u;
+    tcg_target_call_clobber_regs = -1ull;

There are not 64 registers, so this is incorrect.
I don't think your logic is correct.


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