qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 03/13] target/riscv: Ignore the pc bits above XLEN


From: Richard Henderson
Subject: Re: [PATCH 03/13] target/riscv: Ignore the pc bits above XLEN
Date: Tue, 2 Nov 2021 06:20:14 -0400
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0

On 11/1/21 6:01 AM, LIU Zhiwei wrote:
The read from PC for translation is in cpu_get_tb_cpu_state, before translation.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
---
  target/riscv/cpu_helper.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 7d0aee6769..eb425d74d2 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -71,7 +71,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong 
*pc,
  {
      uint32_t flags = 0;
- *pc = env->pc;
+    *pc = cpu_get_xl(env) == MXL_RV32 ? env->pc & UINT32_MAX : env->pc;
      *cs_base = 0;

Oh, let's not compute cpu_get_xl twice -- currently we do it at the end of the function when we store into flags. Move that as necessary.


r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]