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Re: [PATCH 1/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check fu
From: |
Alistair Francis |
Subject: |
Re: [PATCH 1/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check funtion for widening fp insns |
Date: |
Wed, 5 Jan 2022 07:49:48 +1000 |
On Wed, Dec 29, 2021 at 12:15 PM <frank.chang@sifive.com> wrote:
>
> From: Frank Chang <frank.chang@sifive.com>
>
> Vector widening floating-point instructions should use
> require_scale_rvf() instead of require_rvf() to check whether RVF/RVD is
> enabled.
Missing Signed off by line
Alistair
> ---
> target/riscv/insn_trans/trans_rvv.c.inc | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
> b/target/riscv/insn_trans/trans_rvv.c.inc
> index 5e3f7fdb77..8d92243f2b 100644
> --- a/target/riscv/insn_trans/trans_rvv.c.inc
> +++ b/target/riscv/insn_trans/trans_rvv.c.inc
> @@ -2254,7 +2254,8 @@ GEN_OPFVF_TRANS(vfrsub_vf, opfvf_check)
> static bool opfvv_widen_check(DisasContext *s, arg_rmrr *a)
> {
> return require_rvv(s) &&
> - require_rvf(s) &&
> + require_scale_rvf(s) &&
> + (s->sew != MO_8) &&
> vext_check_isa_ill(s) &&
> vext_check_dss(s, a->rd, a->rs1, a->rs2, a->vm);
> }
> @@ -2292,7 +2293,8 @@ GEN_OPFVV_WIDEN_TRANS(vfwsub_vv, opfvv_widen_check)
> static bool opfvf_widen_check(DisasContext *s, arg_rmrr *a)
> {
> return require_rvv(s) &&
> - require_rvf(s) &&
> + require_scale_rvf(s) &&
> + (s->sew != MO_8) &&
> vext_check_isa_ill(s) &&
> vext_check_ds(s, a->rd, a->rs2, a->vm);
> }
> @@ -2321,7 +2323,8 @@ GEN_OPFVF_WIDEN_TRANS(vfwsub_vf)
> static bool opfwv_widen_check(DisasContext *s, arg_rmrr *a)
> {
> return require_rvv(s) &&
> - require_rvf(s) &&
> + require_scale_rvf(s) &&
> + (s->sew != MO_8) &&
> vext_check_isa_ill(s) &&
> vext_check_dds(s, a->rd, a->rs1, a->rs2, a->vm);
> }
> @@ -2359,7 +2362,8 @@ GEN_OPFWV_WIDEN_TRANS(vfwsub_wv)
> static bool opfwf_widen_check(DisasContext *s, arg_rmrr *a)
> {
> return require_rvv(s) &&
> - require_rvf(s) &&
> + require_scale_rvf(s) &&
> + (s->sew != MO_8) &&
> vext_check_isa_ill(s) &&
> vext_check_dd(s, a->rd, a->rs2, a->vm);
> }
> --
> 2.31.1
>
>
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