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[PATCH v9 2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner
From: |
Weiwei Li |
Subject: |
[PATCH v9 2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE |
Date: |
Fri, 4 Feb 2022 10:26:55 +0800 |
For non-leaf PTEs, the D, A, and U bits are reserved for future standard use.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu_helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index de07aee301..61c3a9a4ad 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -640,6 +640,9 @@ restart:
return TRANSLATE_FAIL;
} else if (!(pte & (PTE_R | PTE_W | PTE_X))) {
/* Inner PTE, continue walking */
+ if (pte & (PTE_D | PTE_A | PTE_U)) {
+ return TRANSLATE_FAIL;
+ }
base = ppn << PGSHIFT;
} else if ((pte & (PTE_R | PTE_W | PTE_X)) == PTE_W) {
/* Reserved leaf PTE flags: PTE_W */
--
2.17.1
- [PATCH v9 0/5] support subsets of virtual memory extension, Weiwei Li, 2022/02/03
- [PATCH v9 5/5] target/riscv: add support for svpbmt extension, Weiwei Li, 2022/02/03
- [PATCH v9 3/5] target/riscv: add support for svnapot extension, Weiwei Li, 2022/02/03
- [PATCH v9 1/5] target/riscv: Ignore reserved bits in PTE for RV64, Weiwei Li, 2022/02/03
- [PATCH v9 4/5] target/riscv: add support for svinval extension, Weiwei Li, 2022/02/03
- [PATCH v9 2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE,
Weiwei Li <=
- Re: [PATCH v9 0/5] support subsets of virtual memory extension, Alistair Francis, 2022/02/09