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[PATCH v1] hw: riscv: opentitan: fixup SPI addresses
From: |
Alistair Francis |
Subject: |
[PATCH v1] hw: riscv: opentitan: fixup SPI addresses |
Date: |
Wed, 16 Feb 2022 16:22:48 +1000 |
From: Wilfred Mallawa <wilfred.mallawa@wdc.com>
This patch updates the SPI_DEVICE, SPI_HOST0, SPI_HOST1
base addresses. Also adds these as unimplemented devices.
The address references can be found [1].
[1]
https://github.com/lowRISC/opentitan/blob/6c317992fbd646818b34f2a2dbf44bc850e461e4/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h#L107
Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
---
hw/riscv/opentitan.c | 12 +++++++++---
include/hw/riscv/opentitan.h | 4 +++-
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index aec7cfa33f..596b518a26 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -33,8 +33,10 @@ static const MemMapEntry ibex_memmap[] = {
[IBEX_DEV_RAM] = { 0x10000000, 0x10000 },
[IBEX_DEV_FLASH] = { 0x20000000, 0x80000 },
[IBEX_DEV_UART] = { 0x40000000, 0x1000 },
+ [IBEX_DEV_SPI_HOST0] = { 0x40300000, 0x1000 },
+ [IBEX_DEV_SPI_HOST1] = { 0x40310000, 0x1000 },
[IBEX_DEV_GPIO] = { 0x40040000, 0x1000 },
- [IBEX_DEV_SPI] = { 0x40050000, 0x1000 },
+ [IBEX_DEV_SPI_DEVICE] = { 0x40050000, 0x1000 },
[IBEX_DEV_I2C] = { 0x40080000, 0x1000 },
[IBEX_DEV_PATTGEN] = { 0x400e0000, 0x1000 },
[IBEX_DEV_TIMER] = { 0x40100000, 0x1000 },
@@ -209,8 +211,12 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc,
Error **errp)
create_unimplemented_device("riscv.lowrisc.ibex.gpio",
memmap[IBEX_DEV_GPIO].base, memmap[IBEX_DEV_GPIO].size);
- create_unimplemented_device("riscv.lowrisc.ibex.spi",
- memmap[IBEX_DEV_SPI].base, memmap[IBEX_DEV_SPI].size);
+ create_unimplemented_device("riscv.lowrisc.ibex.spi_device",
+ memmap[IBEX_DEV_SPI_DEVICE].base, memmap[IBEX_DEV_SPI_DEVICE].size);
+ create_unimplemented_device("riscv.lowrisc.ibex.spi_host0",
+ memmap[IBEX_DEV_SPI_HOST0].base, memmap[IBEX_DEV_SPI_HOST0].size);
+ create_unimplemented_device("riscv.lowrisc.ibex.spi_host1",
+ memmap[IBEX_DEV_SPI_HOST1].base, memmap[IBEX_DEV_SPI_HOST1].size);
create_unimplemented_device("riscv.lowrisc.ibex.i2c",
memmap[IBEX_DEV_I2C].base, memmap[IBEX_DEV_I2C].size);
create_unimplemented_device("riscv.lowrisc.ibex.pattgen",
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
index eac35ef590..00da9ded43 100644
--- a/include/hw/riscv/opentitan.h
+++ b/include/hw/riscv/opentitan.h
@@ -57,8 +57,10 @@ enum {
IBEX_DEV_FLASH,
IBEX_DEV_FLASH_VIRTUAL,
IBEX_DEV_UART,
+ IBEX_DEV_SPI_DEVICE,
+ IBEX_DEV_SPI_HOST0,
+ IBEX_DEV_SPI_HOST1,
IBEX_DEV_GPIO,
- IBEX_DEV_SPI,
IBEX_DEV_I2C,
IBEX_DEV_PATTGEN,
IBEX_DEV_TIMER,
--
2.35.1
- [PATCH v1] hw: riscv: opentitan: fixup SPI addresses,
Alistair Francis <=