qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH 2/5] target/riscv: add riscv_cpu_release_claimed_interrupts funct


From: Damien Hedde
Subject: [PATCH 2/5] target/riscv: add riscv_cpu_release_claimed_interrupts function
Date: Fri, 18 Feb 2022 17:46:43 +0100

This function will be used to undo an interrupt claim made by
a previous call to riscv_cpu_claim_interrupts().

Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
---
 target/riscv/cpu.h        | 7 +++++++
 target/riscv/cpu_helper.c | 8 ++++++++
 2 files changed, 15 insertions(+)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 8183fb86d5..9f0c432053 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -469,6 +469,13 @@ void riscv_cpu_list(void);
 bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request);
 void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env);
 int riscv_cpu_claim_interrupts(RISCVCPU *cpu, uint64_t interrupts);
+
+/*
+ * riscv_cpu_release_unclaimed_interrupts:
+ * Release previously claimed interrupts by riscv_cpu_claim_interrupts().
+ */
+void riscv_cpu_release_claimed_interrupts(RISCVCPU *cpu, uint64_t interrupts);
+
 uint64_t riscv_cpu_update_mip(RISCVCPU *cpu, uint64_t mask, uint64_t value);
 #define BOOL_TO_MASK(x) (-!!(x)) /* helper for riscv_cpu_update_mip value */
 void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64_t (*fn)(uint32_t),
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 746335bfd6..170fed6dff 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -596,6 +596,14 @@ int riscv_cpu_claim_interrupts(RISCVCPU *cpu, uint64_t 
interrupts)
     }
 }
 
+void riscv_cpu_release_claimed_interrupts(RISCVCPU *cpu, uint64_t interrupts)
+{
+    CPURISCVState *env = &cpu->env;
+    /* ensure all claimed interrupt are really there */
+    g_assert((env->miclaim & interrupts) == interrupts);
+    env->miclaim &= ~interrupts;
+}
+
 uint64_t riscv_cpu_update_mip(RISCVCPU *cpu, uint64_t mask, uint64_t value)
 {
     CPURISCVState *env = &cpu->env;
-- 
2.35.1




reply via email to

[Prev in Thread] Current Thread [Next in Thread]