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Re: [PATCH 3/3] target/riscv: Skip parsing extensions from properties fo


From: Alistair Francis
Subject: Re: [PATCH 3/3] target/riscv: Skip parsing extensions from properties for KVM
Date: Mon, 13 Jun 2022 10:36:07 +1000

On Thu, Jun 9, 2022 at 11:11 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> When running with accel=kvm, the extensions are actually told by
> KVM, so let's skip the parsing logic from properties for KVM.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>
>  target/riscv/cpu.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 61d1737741..ff911017c3 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -581,8 +581,11 @@ static void riscv_cpu_realize(DeviceState *dev, Error 
> **errp)
>      }
>      assert(env->misa_mxl_max == env->misa_mxl);
>
> -    /* If only MISA_EXT is unset for misa, then set it from properties */
> -    if (env->misa_ext == 0) {
> +    /*
> +     * If only MISA_EXT is unset for misa, then set it from properties.
> +     * For KVM, misa is told by KVM so properties are ignored.
> +     */
> +    if (!kvm_enabled() && env->misa_ext == 0) {
>          uint32_t ext = 0;
>
>          /* Do some ISA extension error checking */
> --
> 2.34.1
>
>



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