[PATCH] include/hw/riscv: QOMify shakti_c

[Vijai Kumar K]

Signed-off-by: Vijai Kumar K <vijai@behindbytes.com>
---
 include/hw/riscv/shakti_c.h | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/hw/riscv/shakti_c.h b/include/hw/riscv/shakti_c.h
index daf0aae13f..2b50f1a2a7 100644
--- a/include/hw/riscv/shakti_c.h
+++ b/include/hw/riscv/shakti_c.h
@@ -1,7 +1,7 @@
 /*
  * Shakti C-class SoC emulation
  *
- * Copyright (c) 2021 Vijai Kumar K <vijai@behindbytes.com>
+ * Copyright (c) 2021-2022 Vijai Kumar K <vijai@behindbytes.com>
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -22,12 +22,12 @@
 #include "hw/riscv/riscv_hart.h"
 #include "hw/boards.h"
 #include "hw/char/shakti_uart.h"
+#include "qom/object.h"
 
 #define TYPE_RISCV_SHAKTI_SOC "riscv.shakti.cclass.soc"
-#define RISCV_SHAKTI_SOC(obj) \
-    OBJECT_CHECK(ShaktiCSoCState, (obj), TYPE_RISCV_SHAKTI_SOC)
+OBJECT_DECLARE_SIMPLE_TYPE(ShaktiCSoCState, RISCV_SHAKTI_SOC)
 
-typedef struct ShaktiCSoCState {
+struct ShaktiCSoCState {
     /*< private >*/
     DeviceState parent_obj;
 
@@ -37,18 +37,18 @@ typedef struct ShaktiCSoCState {
     ShaktiUartState uart;
     MemoryRegion rom;
 
-} ShaktiCSoCState;
+};
 
 #define TYPE_RISCV_SHAKTI_MACHINE MACHINE_TYPE_NAME("shakti_c")
-#define RISCV_SHAKTI_MACHINE(obj) \
-    OBJECT_CHECK(ShaktiCMachineState, (obj), TYPE_RISCV_SHAKTI_MACHINE)
-typedef struct ShaktiCMachineState {
+OBJECT_DECLARE_SIMPLE_TYPE(ShaktiCMachineState, RISCV_SHAKTI_MACHINE)
+
+struct ShaktiCMachineState {
     /*< private >*/
     MachineState parent_obj;
 
     /*< public >*/
     ShaktiCSoCState soc;
-} ShaktiCMachineState;
+};
 
 enum {
     SHAKTI_C_ROM,
-- 
2.25.1