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Re: [PATCH] hw/riscv: microchip_pfsoc: fix kernel panics due to missing


From: Alistair Francis
Subject: Re: [PATCH] hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripherals
Date: Mon, 15 Aug 2022 09:56:07 +1000

On Mon, Aug 15, 2022 at 8:48 AM <Conor.Dooley@microchip.com> wrote:
>
> On 14/08/2022 23:08, Alistair Francis wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the 
> > content is safe
> >
> > On Sat, Aug 13, 2022 at 11:51 PM Conor Dooley <mail@conchuod.ie> wrote:
> >> QEMU support for PolarFire SoC seems to be fairly out of date at this
> >> point. Running with a recent HSS, U-Boot etc doesn't work, partly due
> >> to the unimplemented cache controller that the HSS tries to read from
> >> (it needs to know the ways configuration now) and the rest seems to be
> >> down to 64 bit address DMA to the sd card (not 100% on that yet).
> >> There's some patches floating around internally that supposedly fixed
> >> things for QEMU v6.something but I could not replicate & they're fairly
> >> conflicty at this point. Plan is to clean them up, but no point sitting
> >> on this patch until then as I have no ETA for that at this point.
> >
> > Awesome! It is great to see Microchip supporting open source projects
>
> Better late than never ehh..
> As I said, no ETA yet as I don't know just how far off the sd card stuff
> is, but it's in the todo pile. In the meantime, I'll keep an eye out here
> which I am ~certain we haven't been doing so far. I've added QEMU stuff
> to my build/test scripts now that I've got the direct kernel boot working
> for me so hopefully once things get fixed, they'll stay that way.

Great! That is good to hear :)

Alistair

>
> Thanks,
> Conor.



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