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Re: [PATCH] target/riscv/pmp: fix non-translated page size address check

From: Leon Schuermann
Subject: Re: [PATCH] target/riscv/pmp: fix non-translated page size address checks w/ MPU
Date: Tue, 06 Sep 2022 10:45:46 -0400

leon@is.currently.online writes:
> While there possibly are other unhandled edge cases in which
> page-granularity access checks might not be appropriate, this commit
> appears to be a strict improvement over the current implementation's
> behavior.

One particular example of an additional edge case might be a hart
operating in M-mode. Given that virtual memory through
{Sv32,Sv39,Sv48,Sv57} is only supported for S-mode and U-mode
respectively, enabling virtual memory in the satp CSR should not have
any effect on the behavior of memory accesses w.r.t. PMP checks for
harts operating in M-mode.

I'm going to defer adding this additional check, as I'd appreciate some
feedback as to whether my reasoning is correct here at all first.



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