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Re: [PATCH 2/3] hw/riscv: opentitan: Fixup resetvec
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From: |
Wilfred Mallawa |
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Subject: |
Re: [PATCH 2/3] hw/riscv: opentitan: Fixup resetvec |
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Date: |
Sat, 17 Sep 2022 00:53:48 +0000 |
On Wed, 2022-09-14 at 12:11 +0200, Alistair Francis via wrote:
> The resetvec for the OpenTitan machine ended up being set to an out
> of
> date value, so let's fix that and bump it to the correct start
> address
> (after the boot ROM)
>
> Fixes: bf8803c64d75 "hw/riscv: opentitan: bump opentitan version"
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> hw/riscv/opentitan.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index af13dbe3b1..45c92c9bbc 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -142,7 +142,7 @@ static void lowrisc_ibex_soc_realize(DeviceState
> *dev_soc, Error **errp)
> &error_abort);
> object_property_set_int(OBJECT(&s->cpus), "num-harts", ms-
> >smp.cpus,
> &error_abort);
> - object_property_set_int(OBJECT(&s->cpus), "resetvec",
> 0x20000490,
> + object_property_set_int(OBJECT(&s->cpus), "resetvec",
> 0x20000400,
> &error_abort);
> sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal);
>
Reviewed by: Wilfred Mallawa <wilfred.mallawa@wdc.com>