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Re: [PATCH v7 3/4] target/riscv: implement Zicbom extension

From: Richard Henderson
Subject: Re: [PATCH v7 3/4] target/riscv: implement Zicbom extension
Date: Thu, 23 Feb 2023 14:07:33 -1000
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1

On 2/23/23 13:44, Daniel Henrique Barboza wrote:
From: Christoph Muellner<cmuellner@linux.com>

Zicbom is the Cache-Block Management extension defined in the already
ratified RISC-V Base Cache Management Operation (CBO) ISA extension [1].

The extension contains three instructions: cbo.clean, cbo.flush and
cbo.inval. All of them must be implemented in the same group as LQ and
cbo.zero due to overlapping patterns.

All these instructions can throw a Illegal Instruction/Virtual
Instruction exception, similar to the existing cbo.zero. The same
check_zicbo_envcfg() is used to handle these exceptions.

Aside from that, these instructions also need to handle page faults and
guest page faults. This is done in a new check_zicbom_access() helper.

As with Zicboz, the cache block size for Zicbom is also configurable.
Note that the spec determines that Zicbo[mp] and Zicboz can have
different cache sizes (Section 2.7 of [1]), so we also include a
'cbom_blocksize' to go along with the existing 'cboz_blocksize'. They
are set to the same size, so unless users want to play around with the
settings both sizes will be the same.


Co-developed-by: Philipp Tomsich<philipp.tomsich@vrull.eu>
Signed-off-by: Christoph Muellner<cmuellner@linux.com>
Signed-off-by: Daniel Henrique Barboza<dbarboza@ventanamicro.com>
  target/riscv/cpu.c                          |  3 +
  target/riscv/cpu.h                          |  2 +
  target/riscv/helper.h                       |  2 +
  target/riscv/insn32.decode                  |  5 ++
  target/riscv/insn_trans/trans_rvzicbo.c.inc | 27 +++++++++
  target/riscv/op_helper.c                    | 67 +++++++++++++++++++++
  6 files changed, 106 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


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