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[PATCH 38/70] target/ppc: Avoid tcg_const_* in xxeval
From: |
Richard Henderson |
Subject: |
[PATCH 38/70] target/ppc: Avoid tcg_const_* in xxeval |
Date: |
Sun, 26 Feb 2023 19:42:01 -1000 |
Initialize a new temp instead of tcg_const_*.
Fix a pasto in a comment.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/translate/vsx-impl.c.inc | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/ppc/translate/vsx-impl.c.inc
b/target/ppc/translate/vsx-impl.c.inc
index 6e63403727..9916784e64 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -2449,7 +2449,8 @@ static void gen_xxeval_i64(TCGv_i64 t, TCGv_i64 a,
TCGv_i64 b, TCGv_i64 c,
TCGv_i64 conj, disj;
conj = tcg_temp_new_i64();
- disj = tcg_const_i64(0);
+ disj = tcg_temp_new_i64();
+ tcg_gen_movi_i64(disj, 0);
/* Iterate over set bits from the least to the most significant bit */
while (imm) {
@@ -2492,8 +2493,9 @@ static void gen_xxeval_vec(unsigned vece, TCGv_vec t,
TCGv_vec a, TCGv_vec b,
int bit;
TCGv_vec disj, conj;
- disj = tcg_const_zeros_vec_matching(t);
conj = tcg_temp_new_vec_matching(t);
+ disj = tcg_temp_new_vec_matching(t);
+ tcg_gen_dupi_vec(vece, disj, 0);
/* Iterate over set bits from the least to the most significant bit */
while (imm) {
@@ -2546,7 +2548,7 @@ static bool trans_XXEVAL(DisasContext *ctx,
arg_8RR_XX4_imm *a)
/* Equivalent functions that can be implemented with a single gen_gvec */
switch (a->imm) {
- case 0b00000000: /* true */
+ case 0b00000000: /* false */
set_cpu_vsr(a->xt, tcg_constant_i64(0), true);
set_cpu_vsr(a->xt, tcg_constant_i64(0), false);
break;
--
2.34.1
- [PATCH 28/70] target/m68k: Avoid tcg_const_* throughout, (continued)
- [PATCH 28/70] target/m68k: Avoid tcg_const_* throughout, Richard Henderson, 2023/02/27
- [PATCH 29/70] target/microblaze: Avoid tcg_const_* throughout, Richard Henderson, 2023/02/27
- [PATCH 33/70] target/mips: Avoid tcg_const_* throughout, Richard Henderson, 2023/02/27
- [PATCH 31/70] target/mips: Split out gen_lxr, Richard Henderson, 2023/02/27
- [PATCH 32/70] target/mips: Avoid tcg_const_tl in gen_r6_ld, Richard Henderson, 2023/02/27
- [PATCH 34/70] target/ppc: Split out gen_vx_vmul10, Richard Henderson, 2023/02/27
- [PATCH 35/70] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad, Richard Henderson, 2023/02/27
- [PATCH 36/70] target/ppc: Avoid tcg_const_i64 in do_vcntmb, Richard Henderson, 2023/02/27
- [PATCH 37/70] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc, Richard Henderson, 2023/02/27
- [PATCH 38/70] target/ppc: Avoid tcg_const_* in xxeval,
Richard Henderson <=
- [PATCH 39/70] target/ppc: Avoid tcg_const_* in vsx-impl.c.inc, Richard Henderson, 2023/02/27
- [PATCH 40/70] target/ppc: Avoid tcg_const_* in fp-impl.c.inc, Richard Henderson, 2023/02/27
- [PATCH 41/70] target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc, Richard Henderson, 2023/02/27
- [PATCH 42/70] target/ppc: Rewrite trans_ADDG6S, Richard Henderson, 2023/02/27
- [PATCH 43/70] target/ppc: Fix gen_tlbsx_booke206, Richard Henderson, 2023/02/27
- [PATCH 45/70] target/riscv: Avoid tcg_const_*, Richard Henderson, 2023/02/27
- [PATCH 47/70] target/rx: Use cpu_psw_z as temp in flags computation, Richard Henderson, 2023/02/27
- [PATCH 48/70] target/rx: Avoid tcg_const_i32 when new temp needed, Richard Henderson, 2023/02/27
- [PATCH 46/70] target/rx: Use tcg_gen_abs_i32, Richard Henderson, 2023/02/27