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Re: [qemu-s390x] [PATCH-for-4.2 v1 2/6] s390x/tcg: Rework MMU selection
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From: |
Cornelia Huck |
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Subject: |
Re: [qemu-s390x] [PATCH-for-4.2 v1 2/6] s390x/tcg: Rework MMU selection for instruction fetches |
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Date: |
Tue, 13 Aug 2019 15:16:46 +0200 |
On Mon, 12 Aug 2019 13:27:33 +0200
David Hildenbrand <address@hidden> wrote:
> Instructions are always fetched from primary address space, except when
> in home address mode. Perform the selection directly in cpu_mmu_index().
>
> get_mem_index() is only used to perform data access, instructions are
> fetched via cpu_lduw_code(), which translates to cpu_mmu_index(env, true).
>
> We don't care about restricting the access permissions of the TLB
> entries anymore, as we no longer enter PRIMARY entries into the
> SECONDARY MMU. Cleanup related code a bit.
>
> Signed-off-by: David Hildenbrand <address@hidden>
> ---
> target/s390x/cpu.h | 7 +++++++
> target/s390x/mmu_helper.c | 35 ++++++++++++++---------------------
> 2 files changed, 21 insertions(+), 21 deletions(-)
Looks sane to me; will wait for v2 to give a tag.
[qemu-s390x] [PATCH-for-4.2 v1 2/6] s390x/tcg: Rework MMU selection for instruction fetches, David Hildenbrand, 2019/08/12
Re: [qemu-s390x] [PATCH-for-4.2 v1 2/6] s390x/tcg: Rework MMU selection for instruction fetches,
Cornelia Huck <=
[qemu-s390x] [PATCH-for-4.2 v1 3/6] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE, David Hildenbrand, 2019/08/12
[qemu-s390x] [PATCH-for-4.2 v1 4/6] s390x/mmu: Trace the right value if setting/getting the storage key fails, David Hildenbrand, 2019/08/12
[qemu-s390x] [PATCH-for-4.2 v1 5/6] s390x/mmu: Better storage key reference and change bit handling, David Hildenbrand, 2019/08/12
[qemu-s390x] [PATCH-for-4.2 v1 6/6] s390x/mmu: Factor out storage key handling, David Hildenbrand, 2019/08/12